summaryrefslogtreecommitdiff
path: root/drivers/cxl/acpi.c
AgeCommit message (Expand)AuthorFilesLines
2026-06-12cxl: Align interleave decode/encode helpers with their callersAlison Schofield1-5/+5
2026-02-21Convert 'alloc_obj' family to use the new default GFP_KERNEL argumentLinus Torvalds1-2/+2
2026-02-21treewide: Replace kmalloc with kmalloc_obj for non-scalar typesKees Cook1-2/+2
2026-02-12Merge tag 'cxl-for-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxlLinus Torvalds1-31/+15
2026-02-04Merge branch 'for-7.0/cxl-prm-translation' into cxl-for-nextDave Jiang1-7/+10
2026-02-04cxl: Enable AMD Zen5 address translation using ACPI PRMTRobert Richter1-0/+2
2026-02-03cxl/acpi: Prepare use of EFI runtime servicesRobert Richter1-2/+6
2026-02-03cxl: Simplify cxl_root_ops allocation and handlingRobert Richter1-5/+2
2026-01-22cxl/acpi: Remove cxl_acpi_set_cache_size()Li Ming1-24/+5
2026-01-09cxl/acpi: Restore HBIW check before dereferencing platform_dataAlison Schofield1-2/+9
2025-11-14Merge branch 'for-6.19/cxl-prm' into cxl-for-nextDave Jiang1-11/+4
2025-11-14cxl/acpi: Group xor arithmetric setup code in a single blockRobert Richter1-7/+4
2025-11-14cxl: Simplify cxl_rd_ops allocation and handlingRobert Richter1-6/+2
2025-11-13Merge branch 'for-6.19/cxl-elc' into cxl-for-nextDave Jiang1-10/+7
2025-11-03cxl: Adjust extended linear cache failure emission in cxl_acpiDave Jiang1-10/+7
2025-11-03cxl/acpi: Make the XOR calculations available for testingAlison Schofield1-11/+30
2025-10-14cxl/acpi: Fix setup of memory resource in cxl_acpi_set_cache_size()Dave Jiang1-1/+1
2025-09-18Merge branch 'for-6.18/cxl-delay-dport' into cxl-for-nextDave Jiang1-4/+3
2025-09-17cxl: Add a cached copy of target_map to cxl_decoderDave Jiang1-4/+3
2025-09-10cxl/acpi: Rename CFMW coherency restrictionsDavidlohr Bueso1-2/+2
2025-08-12cxl: Define a SPA->CXL HPA root decoder callback for XOR MathAlison Schofield1-11/+16
2025-08-12cxl: Move hpa_to_spa callback to a new root decoder ops structureAlison Schofield1-3/+7
2025-07-15cxl: Remove core/acpi.c and cxl core dependency on ACPIRobert Richter1-0/+59
2025-05-13cxl: Sync up the driver-api/cxl documentationAlison Schofield1-3/+3
2025-05-09Merge branch 'for-6.16/cxl-cleanups' into cxl-for-nextDave Jiang1-1/+9
2025-05-09cxl: Add a dev_dbg() when a decoder was added to a portRobert Richter1-1/+9
2025-04-28cxl/acpi: Verify CHBS length for CXL2.0Li Zhijian1-3/+5
2024-12-02module: Convert symbol namespace to string literalPeter Zijlstra1-2/+2
2024-10-25cxl/acpi: Ensure ports ready at cxl_acpi_probe() returnDan Williams1-0/+7
2024-07-11Merge branch 'for-6.11/xor_fixes' into cxl-for-nextDave Jiang1-50/+34
2024-07-11cxl: Remove defunct code calculating host bridge target positionsAlison Schofield1-58/+2
2024-07-11cxl: Restore XOR'd position bits during address translationAlison Schofield1-0/+40
2024-07-10cxl/acpi: Warn on mixed CXL VH and RCH/RCD HierarchyFabio M. De Francesco1-7/+27
2024-07-02cxl: add missing MODULE_DESCRIPTION() macrosJeff Johnson1-0/+1
2024-05-01cxl/acpi: Cleanup __cxl_parse_cfmws()Dan Williams1-42/+51
2024-04-08cxl: Consolidate dport access_coordinate ->hb_coord and ->sw_coord into ->coordDave Jiang1-1/+1
2024-04-08cxl: Fix incorrect region perf data calculationDave Jiang1-12/+1
2024-03-12ACPI: HMAT / cxl: Add retrieval of generic port coordinates for both access c...Dave Jiang1-3/+5
2024-02-20cxl/acpi: Fix load failures due to single window creation failureDan Williams1-18/+28
2024-01-05cxl: Convert find_cxl_root() to return a 'struct cxl_root *'Dave Jiang1-4/+2
2023-12-22cxl: Store the access coordinates for the generic portsDave Jiang1-0/+25
2023-12-22cxl: Add support for _DSM Function for retrieving QTG IDDave Jiang1-3/+129
2023-10-27cxl: Export QTG ids from CFMWS to sysfs as qos_class attributeDave Jiang1-0/+3
2023-09-22cxl/acpi: Annotate struct cxl_cxims_data with __counted_byKees Cook1-2/+2
2023-07-18cxl/acpi: Return 'rc' instead of '0' in cxl_parse_cfmws()Breno Leitao1-1/+1
2023-07-18cxl/acpi: Fix a use-after-free in cxl_parse_cfmws()Breno Leitao1-2/+1
2023-06-25Merge branch 'for-6.5/cxl-rch-eh' into for-6.5/cxlDan Williams1-90/+116
2023-06-25cxl/port: Rename CXL_DECODER_{EXPANDER, ACCELERATOR} => {HOSTONLYMEM, DEVMEM}Dan Williams1-1/+1
2023-06-25cxl/acpi: Directly bind the CEDT detected CHBCR to the Host Bridge's portRobert Richter1-28/+63
2023-06-25cxl/acpi: Move add_host_bridge_uport() after cxl_get_chbs()Robert Richter1-45/+45
generated by cgit (git 2.54.0.dirty) at 2026-09-13 15:11:50 +0000