pub/scm/linux/kernel/git/modules/linux.git - mcgrof's fork of linux.git

Age	Commit message (Expand)	Author	Files	Lines
2026-08-20	Merge branches 'clk-pile' and 'clk-microchip' into clk-next	Stephen Boyd	1	-7/+1
2026-08-17	Merge tag 'clk-misc-for-v7.3' of ssh://github.com/masneyb/linux into clk-pile	Stephen Boyd	1	-7/+1
2026-08-06	clk: renesas: Add R-Car X5H CPG driver	Geert Uytterhoeven	3	-0/+171
2026-08-05	Merge tag 'renesas-r8a78000-dt-binding-defs-tag2' into renesas-clk-for-v7.3	Geert Uytterhoeven	4	-4/+0
2026-07-13	clk: r9a08g045: Add clocks and resets for CAN-FD	Claudiu Beznea	1	-0/+9
2026-07-03	Replace <linux/mod_devicetable.h> by more specific <linux/device-id/*.h> (c f...	Uwe Kleine-König (The Capable Hub)	4	-4/+0
2026-06-30	clk: renesas: r9a09g047: Add LVDS clocks and resets	Tommaso Merciai	1	-0/+11
2026-06-30	clk: renesas: r9a09g077: Add LCDC and PLL3 clock support for RZ/T2H display p...	Lad Prabhakar	2	-0/+373
2026-06-30	clk: renesas: rzv2h-cpg: Extract PLL calculation helpers into shared library	Lad Prabhakar	4	-203/+222
2026-06-30	clk: renesas: rzv2h-cpg: Use per-SoC PLL reference frequency for calculations	Lad Prabhakar	1	-4/+4
2026-06-30	clk: renesas: r9a08g046: Add USB2.0 clock and reset entries	Biju Das	1	-0/+15
2026-06-30	clk: renesas: r9a09g077: Add RTC clocks	Lad Prabhakar	1	-1/+3
2026-06-30	clk: renesas: cpg-mssr: Implement dedicated MSTP delay logic for RZ/T2H LCDC ...	Lad Prabhakar	1	-2/+18
2026-06-30	clk: renesas: r9a08g046: Add clock and reset entries for GE3D	Biju Das	1	-0/+23
2026-06-30	clk: renesas: r9a08g046: Add clock and reset entries for SDHI	Biju Das	1	-0/+92
2026-06-30	clk: renesas: r9a09g047: Add audio clock and reset support	John Madieu	1	-1/+111
2026-06-29	clk: renesas: rzg2l-cpg: use clk_determine_rate_noop()	Brian Masney	1	-7/+1
2026-05-28	clk: renesas: r9a08g045: Drop unused pm_domain header file	Biju Das	1	-1/+0
2026-05-28	clk: renesas: r8a779g0: Add DSC clock	Marek Vasut	1	-0/+1
2026-05-25	clk: renesas: rzg2l: Rename iterator in for_each_mod_clock() to avoid shadowing	Lad Prabhakar	1	-3/+3
2026-05-25	clk: renesas: r9a08g045: Drop unused DEF_G3S_MUX macro	Lad Prabhakar	1	-7/+0
2026-05-22	clk: renesas: rzg2l: Rename RZG3L-prefixed PLL macros to CPG-prefixed ones	Biju Das	1	-14/+12
2026-05-22	clk: renesas: rzg3s/rzg3l: Simplify PLL configuration macro	Biju Das	4	-15/+9
2026-05-22	clk: renesas: rzg2l: Simplify SAM PLL configuration macro	Biju Das	5	-16/+10
2026-05-15	clk: renesas: r8a73a4: Add ZT/ZTR trace clocks	Marek Vasut	1	-0/+2
2026-05-11	clk: renesas: r9a08g046: Add RSPI clocks and resets	Biju Das	1	-0/+49
2026-05-11	clk: renesas: r9a08g046: Add SSIF-2 clocks and resets	Biju Das	1	-0/+20
2026-05-11	clk: renesas: r9a08g046: Add RSCI clocks and resets	Biju Das	1	-0/+71
2026-05-07	clk: renesas: cpg-mssr: Add number of clock cells check	Geert Uytterhoeven	1	-0/+3
2026-05-07	clk: renesas: rzg2l: Refactor rzg3l_cpg_pll_clk_endisable()	Geert Uytterhoeven	1	-9/+7
2026-05-07	clk: renesas: rzg2l: Consolidate DEF_MUX() and DEF_MUX_FLAGS()	Geert Uytterhoeven	1	-8/+5
2026-05-07	clk: renesas: r9a08g046: Add IA55_PCLK to critical module clocks	Biju Das	1	-0/+1
2026-05-04	Merge tag 'clk-renesas-rzg3e-plldsi-tag' into renesas-clk-for-v7.2	Geert Uytterhoeven	3	-0/+277
2026-05-04	clk: renesas: r9a09g047: Add support for LCDC{0,1} clocks and resets	Tommaso Merciai	1	-0/+14
2026-05-04	clk: renesas: r9a09g047: Add support for DSI clocks and resets	Tommaso Merciai	1	-0/+14
2026-05-04	clk: renesas: r9a09g047: Add support for SMUX2_DSI{0,1}_CLK	Tommaso Merciai	2	-0/+11
2026-05-04	clk: renesas: r9a09g047: Add CLK_PLLDSI{0,1}_CSDIV clocks	Tommaso Merciai	2	-0/+19
2026-05-04	clk: renesas: r9a09g047: Add CLK_PLLDSI{0,1}_DIV7 clocks	Tommaso Merciai	1	-0/+5
2026-05-04	clk: renesas: r9a09g047: Add CLK_PLLDSI{0,1} clocks	Tommaso Merciai	1	-0/+11
2026-05-04	clk: renesas: r9a09g047: Add CLK_PLLETH_LPCLK support	Tommaso Merciai	1	-0/+14
2026-05-04	clk: renesas: rzv2h: Add PLLDSI clk mux support	Tommaso Merciai	2	-0/+189
2026-04-27	clk: renesas: r8a7740: Add ZT/ZTR trace clocks	Marek Vasut	1	-0/+2
2026-04-27	clk: renesas: r9a09g077: Add MTU3 module clock	Cosmin Tanislav	1	-0/+1
2026-04-27	clk: renesas: r9a08g046: Add I2C clocks and resets	Biju Das	1	-0/+12
2026-04-27	clk: renesas: r9a08g046: Add SCIF{1..5} clocks and resets	Biju Das	1	-0/+15
2026-04-27	clk: renesas: r9a08g046: Add WDT clocks and reset	Biju Das	1	-0/+5
2026-04-27	clk: renesas: r9a08g046: Add CA55 core clocks	Biju Das	1	-0/+30
2026-04-27	clk: renesas: r9a08g046: Add GPIO clocks/resets	Biju Das	1	-0/+6
2026-04-27	clk: renesas: r9a08g046: Add GBETH clocks and resets	Biju Das	2	-0/+149
2026-04-27	clk: renesas: r8a08g046: Add support for PLL6	Biju Das	1	-0/+6