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riscv
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2025-05-15
riscv: dts: starfive: jh7110-common: add CPU BUS PERH QSPI clocks to syscrg
E Shattow
1
-2
/
+10
2025-05-15
riscv: dts: starfive: jh7110-common: use macros for MMC0 pins
Icenowy Zheng
1
-10
/
+11
2025-05-15
riscv: dts: starfive: fml13v01: enable USB 3.0 port
Sandie Cao
1
-0
/
+19
2025-05-14
Merge tag 'soc-fixes-6.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git...
Linus Torvalds
1
-1
/
+1
2025-05-14
riscv: dts: renesas: Add specific RZ/Five cache compatible
Conor Dooley
1
-1
/
+2
2025-05-14
riscv: dts: spacemit: add gpio LED for system heartbeat
Yixun Lan
1
-0
/
+11
2025-05-14
riscv: dts: spacemit: add gpio support for K1 SoC
Yixun Lan
2
-0
/
+21
2025-05-14
riscv: dts: spacemit: Acquire clocks for UART
Yixun Lan
1
-9
/
+27
2025-05-14
riscv: dts: spacemit: Acquire clocks for pinctrl
Yixun Lan
1
-0
/
+3
2025-05-14
riscv: dts: spacemit: Add clock tree for SpacemiT K1
Haylen Chu
1
-0
/
+75
2025-05-12
crypto: lib/chacha - add array bounds to function prototypes
Eric Biggers
1
-1
/
+2
2025-05-12
crypto: lib/chacha - strongly type the ChaCha state
Eric Biggers
2
-9
/
+9
2025-05-11
riscv: mm: call PUD/P4D ctor in special kernel pgtable alloc
Kevin Brodsky
1
-8
/
+8
2025-05-11
riscv: mm: clarify ctor mm argument in alloc_{pte,pmd}_late
Kevin Brodsky
1
-0
/
+6
2025-05-11
mm: pass mm down to pagetable_{pte,pmd}_ctor
Kevin Brodsky
1
-2
/
+2
2025-05-11
mm/ptdump: split note_page() into level specific callbacks
Anshuman Khandual
1
-2
/
+44
2025-05-11
syscall.h: introduce syscall_set_nr()
Dmitry V. Levin
1
-0
/
+7
2025-05-11
syscall.h: add syscall_set_arguments()
Dmitry V. Levin
1
-0
/
+12
2025-05-11
arch: remove mk_pmd()
Matthew Wilcox (Oracle)
1
-2
/
+0
2025-05-11
mm: introduce a common definition of mk_pte()
Matthew Wilcox (Oracle)
1
-2
/
+0
2025-05-11
Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Linus Torvalds
1
-0
/
+2
2025-05-09
bpf, riscv64: Skip redundant zext instruction after load-acquire
Peilin Ye
2
-7
/
+19
2025-05-09
bpf, riscv64: Support load-acquire and store-release instructions
Andrea Parri
2
-5
/
+85
2025-05-09
bpf, riscv64: Introduce emit_load_*() and emit_store_*()
Andrea Parri
1
-99
/
+143
2025-05-09
Merge tag 'riscv-sophgo-dt-fixes-for-v6.15-rc1' of https://github.com/sophgo/...
Arnd Bergmann
1
-1
/
+1
2025-05-08
Merge patch series "riscv: Add vendor extensions support for SiFive"
Palmer Dabbelt
11
-1
/
+117
2025-05-08
riscv: hwprobe: Add SiFive xsfvfwmaccqqq vendor extension
Cyan Yang
2
-0
/
+2
2025-05-08
riscv: Add SiFive xsfvfwmaccqqq vendor extension
Cyan Yang
2
-0
/
+2
2025-05-08
riscv: hwprobe: Add SiFive xsfvfnrclipxfqf vendor extension
Cyan Yang
2
-0
/
+2
2025-05-08
riscv: Add SiFive xsfvfnrclipxfqf vendor extension
Cyan Yang
2
-0
/
+2
2025-05-08
riscv: hwprobe: Add SiFive vendor extension support and probe for xsfqmaccdod...
Cyan Yang
6
-0
/
+50
2025-05-08
riscv: hwprobe: Document SiFive xsfvqmaccdod and xsfvqmaccqoq vendor extensions
Cyan Yang
2
-1
/
+2
2025-05-08
riscv: Add SiFive xsfvqmaccdod and xsfvqmaccqoq vendor extensions
Cyan Yang
5
-0
/
+57
2025-05-08
riscv: vDSO: Remove --hash-style=both
Xi Ruoyao
1
-1
/
+1
2025-05-08
Merge patch series "riscv: uaccess: optimisations"
Palmer Dabbelt
4
-53
/
+179
2025-05-08
riscv: uaccess: use 'asm_goto_output' for get_user()
Jisheng Zhang
1
-27
/
+68
2025-05-08
riscv: uaccess: use 'asm goto' for put_user()
Jisheng Zhang
1
-38
/
+33
2025-05-08
riscv: uaccess: use input constraints for ptr of __put_user()
Jisheng Zhang
1
-9
/
+9
2025-05-08
riscv: implement user_access_begin() and families
Jisheng Zhang
1
-0
/
+76
2025-05-08
riscv: save the SR_SUM status over switches
Ben Dooks
3
-0
/
+14
2025-05-08
riscv: Disallow PR_GET_TAGGED_ADDR_CTRL without Supm
Samuel Holland
1
-0
/
+3
2025-05-08
riscv: Fix kernel crash due to PR_SET_TAGGED_ADDR_CTRL
Nam Cao
1
-0
/
+3
2025-05-08
riscv: misaligned: use get_user() instead of __get_user()
Clément Léger
1
-1
/
+1
2025-05-08
riscv: misaligned: enable IRQs while handling misaligned accesses
Clément Léger
1
-4
/
+8
2025-05-08
riscv: misaligned: factorize trap handling
Clément Léger
1
-30
/
+36
2025-05-07
riscv: dts: thead: Add device tree VO clock controller
Michal Wilczynski
1
-0
/
+7
2025-05-05
riscv: misaligned: Add handling for ZCB instructions
Nylon Chen
1
-0
/
+17
2025-05-05
crypto: riscv/sha256 - Add simd block function
Herbert Xu
2
-4
/
+10
2025-05-05
crypto: arch/sha256 - Export block functions as GPL only
Herbert Xu
1
-2
/
+2
2025-05-05
Revert "crypto: run initcalls for generic implementations earlier"
Herbert Xu
2
-2
/
+2
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