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path: root/arch/riscv/include/asm/cpufeature.h
AgeCommit message (Expand)AuthorFilesLines
2026-01-25riscv: zicfiss / zicfilp enumerationDeepak Gupta1-0/+12
2025-10-17riscv: add a forward declaration for cpuinfo_opPaul Walmsley1-0/+2
2025-06-04riscv: misaligned: add a function to check misalign trap delegabilityClément Léger1-0/+6
2025-06-04riscv: misaligned: declare misaligned_access_speed under CONFIG_RISCV_MISALIGNEDClément Léger1-1/+4
2025-06-04riscv: misaligned: request misaligned exception from SBIClément Léger1-1/+2
2025-04-01Merge patch series "Add some validation for vector, vector crypto and fp stuff"Alexandre Ghiti1-0/+3
2025-03-25RISC-V: add vector extension validation checksConor Dooley1-0/+3
2025-03-19riscv: Annotate unaligned access init functionsAndrew Jones1-2/+2
2025-01-18riscv: vector: Use vlenb from DT for theadCharlie Jenkins1-0/+2
2024-11-11Merge patch series "Zacas/Zabha support and qspinlocks"Palmer Dabbelt1-57/+4
2024-11-11riscv: Move cpufeature.h macros into their own headerAlexandre Ghiti1-57/+4
2024-10-18Merge patch series "RISC-V: Detect and report speed of unaligned vector acces...Palmer Dabbelt1-1/+9
2024-10-18RISC-V: Detect unaligned vector accesses supportedJesse Taube1-1/+7
2024-10-18RISC-V: Replace RISCV_MISALIGNED with RISCV_SCALAR_MISALIGNEDJesse Taube1-1/+1
2024-10-18RISC-V: Check scalar unaligned access on all CPUsJesse Taube1-0/+2
2024-10-05riscv: Call riscv_user_isa_enable() only on the boot hartSamuel Holland1-1/+1
2024-07-22riscv: cpufeature: Extract common elements from extension checkingCharlie Jenkins1-34/+44
2024-07-22riscv: Extend cpufeature.c to detect vendor extensionsCharlie Jenkins1-0/+25
2024-06-26riscv: add ISA extensions validation callbackClément Léger1-0/+1
2024-03-22Merge tag 'riscv-for-linus-6.9-mw2' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds1-12/+19
2024-03-13riscv: Set unaligned access speed at compile timeCharlie Jenkins1-11/+13
2024-03-13riscv: Decouple emulated unaligned accesses from access speedCharlie Jenkins1-1/+1
2024-03-13riscv: lib: Introduce has_fast_unaligned_access()Charlie Jenkins1-3/+8
2024-02-09work around gcc bugs with 'asm goto' with outputsLinus Torvalds1-2/+2
2024-01-17Merge patch series "riscv: Add fine-tuned checksum functions"Palmer Dabbelt1-0/+2
2024-01-17riscv: Add static key for misaligned accessesCharlie Jenkins1-0/+2
2023-12-12riscv: add ISA extension parsing for scalar cryptoEvan Green1-1/+3
2023-11-09riscv: Rearrange hwcap.h and cpufeature.hXiao Wang1-0/+83
2023-11-07RISC-V: Probe misaligned access speed in parallelEvan Green1-1/+0
2023-11-05Merge patch series "Add support to handle misaligned accesses in S-mode"Palmer Dabbelt1-0/+18
2023-11-01riscv: report misaligned accesses emulation to hwprobeClément Léger1-0/+18
2023-09-21RISC-V: Enable cbo.zero in usermodeAndrew Jones1-0/+1
2023-09-01RISC-V: Probe for unaligned access speedEvan Green1-0/+2
2023-06-19RISC-V: Track ISA extensions per hartEvan Green1-0/+10
2023-04-18RISC-V: hwprobe: Support probing of misaligned access performanceEvan Green1-0/+2
2023-04-18RISC-V: Move struct riscv_cpuinfo to new headerEvan Green1-0/+21