diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/drm/drm_utils.h | 1 | ||||
| -rw-r--r-- | include/dt-bindings/power/fsl,imx93-power.h | 1 | ||||
| -rw-r--r-- | include/dt-bindings/reset/altr,rst-mgr-s10.h | 2 | ||||
| -rw-r--r-- | include/linux/arm_ffa.h | 9 | ||||
| -rw-r--r-- | include/linux/btf.h | 1 | ||||
| -rw-r--r-- | include/linux/can/dev/peak_canfd.h | 2 | ||||
| -rw-r--r-- | include/linux/ieee80211-eht.h | 12 | ||||
| -rw-r--r-- | include/linux/skmsg.h | 14 | ||||
| -rw-r--r-- | include/net/bluetooth/hci_core.h | 1 | ||||
| -rw-r--r-- | include/net/cfg80211.h | 4 | ||||
| -rw-r--r-- | include/net/sctp/structs.h | 3 | ||||
| -rw-r--r-- | include/net/xfrm.h | 2 | ||||
| -rw-r--r-- | include/scsi/scsi_device.h | 1 | ||||
| -rw-r--r-- | include/scsi/scsi_host.h | 3 | ||||
| -rw-r--r-- | include/soc/tegra/pmc.h | 5 | ||||
| -rw-r--r-- | include/sound/aw88399.h | 621 |
16 files changed, 652 insertions, 30 deletions
diff --git a/include/drm/drm_utils.h b/include/drm/drm_utils.h index 6a46f755daba..7e077484c5bb 100644 --- a/include/drm/drm_utils.h +++ b/include/drm/drm_utils.h @@ -19,6 +19,7 @@ int drm_get_panel_orientation_quirk(int width, int height); struct drm_panel_backlight_quirk { u16 min_brightness; u32 brightness_mask; + bool force_pwm; }; const struct drm_panel_backlight_quirk * diff --git a/include/dt-bindings/power/fsl,imx93-power.h b/include/dt-bindings/power/fsl,imx93-power.h index 17f9f015bf7d..071221fe5c57 100644 --- a/include/dt-bindings/power/fsl,imx93-power.h +++ b/include/dt-bindings/power/fsl,imx93-power.h @@ -11,5 +11,6 @@ #define IMX93_MEDIABLK_PD_PXP 2 #define IMX93_MEDIABLK_PD_LCDIF 3 #define IMX93_MEDIABLK_PD_ISI 4 +#define IMX93_MEDIABLK_PD_MIPI_PHY 5 #endif diff --git a/include/dt-bindings/reset/altr,rst-mgr-s10.h b/include/dt-bindings/reset/altr,rst-mgr-s10.h index 04c4d0c6fd34..c2505b9eb63e 100644 --- a/include/dt-bindings/reset/altr,rst-mgr-s10.h +++ b/include/dt-bindings/reset/altr,rst-mgr-s10.h @@ -22,7 +22,7 @@ #define USB0_RESET 35 #define USB1_RESET 36 #define NAND_RESET 37 -/* 38 is empty */ +#define COMBOPHY_RESET 38 #define SDMMC_RESET 39 #define EMAC0_OCP_RESET 40 #define EMAC1_OCP_RESET 41 diff --git a/include/linux/arm_ffa.h b/include/linux/arm_ffa.h index 17eca3dfc59e..e71d83ee0aef 100644 --- a/include/linux/arm_ffa.h +++ b/include/linux/arm_ffa.h @@ -421,6 +421,13 @@ struct ffa_mem_region { #define FFA_EMAD_HAS_IMPDEF_FIELD(version) ((version) >= FFA_VERSION_1_2) #define FFA_MEM_REGION_HAS_EP_MEM_OFFSET(version) ((version) > FFA_VERSION_1_0) +/* The layout changed from FFA_VERSION_1_0 and the region includes an + * ep_mem_offset. + */ +#define FFA_MEM_REGION_SZ(version) (!FFA_MEM_REGION_HAS_EP_MEM_OFFSET((version)) ?\ + offsetof(struct ffa_mem_region, ep_mem_offset) :\ + sizeof(struct ffa_mem_region)) + static inline u32 ffa_emad_size_get(u32 ffa_version) { u32 sz; @@ -445,7 +452,7 @@ ffa_mem_desc_offset(struct ffa_mem_region *buf, int count, u32 ffa_version) if (!FFA_MEM_REGION_HAS_EP_MEM_OFFSET(ffa_version)) offset += offsetof(struct ffa_mem_region, ep_mem_offset); else - offset += sizeof(struct ffa_mem_region); + offset += buf->ep_mem_offset; return offset; } diff --git a/include/linux/btf.h b/include/linux/btf.h index 240401d9b25b..c09b7994de4e 100644 --- a/include/linux/btf.h +++ b/include/linux/btf.h @@ -578,6 +578,7 @@ const char *btf_str_by_offset(const struct btf *btf, u32 offset); struct btf *btf_parse_vmlinux(void); struct btf *bpf_prog_get_target_btf(const struct bpf_prog *prog); u32 *btf_kfunc_flags(const struct btf *btf, u32 kfunc_btf_id, const struct bpf_prog *prog); +int btf_kfunc_check_flag(const struct btf *btf, u32 kfunc_btf_id, u32 flag); bool btf_kfunc_is_allowed(const struct btf *btf, u32 kfunc_btf_id, const struct bpf_prog *prog); u32 *btf_kfunc_is_modify_return(const struct btf *btf, u32 kfunc_btf_id, const struct bpf_prog *prog); diff --git a/include/linux/can/dev/peak_canfd.h b/include/linux/can/dev/peak_canfd.h index d3788a3d0942..056e0efa649f 100644 --- a/include/linux/can/dev/peak_canfd.h +++ b/include/linux/can/dev/peak_canfd.h @@ -3,7 +3,7 @@ * CAN driver for PEAK System micro-CAN based adapters * * Copyright (C) 2003-2025 PEAK System-Technik GmbH - * Author: Stéphane Grosjean <stephane.grosjean@hms-networks.com> + * Author: Stéphane Grosjean <s.grosjean@peak-system.fr> */ #ifndef PUCAN_H #define PUCAN_H diff --git a/include/linux/ieee80211-eht.h b/include/linux/ieee80211-eht.h index 18f9c662cf4c..c109722b1969 100644 --- a/include/linux/ieee80211-eht.h +++ b/include/linux/ieee80211-eht.h @@ -857,7 +857,7 @@ static inline bool ieee80211_mle_size_ok(const u8 *data, size_t len) const struct ieee80211_multi_link_elem *mle = (const void *)data; u8 fixed = sizeof(*mle); u8 common = 0; - bool check_common_len = false; + u8 common_len; u16 control; if (!data || len < fixed) @@ -868,7 +868,6 @@ static inline bool ieee80211_mle_size_ok(const u8 *data, size_t len) switch (u16_get_bits(control, IEEE80211_ML_CONTROL_TYPE)) { case IEEE80211_ML_CONTROL_TYPE_BASIC: common += sizeof(struct ieee80211_mle_basic_common_info); - check_common_len = true; if (control & IEEE80211_MLC_BASIC_PRES_LINK_ID) common += 1; if (control & IEEE80211_MLC_BASIC_PRES_BSS_PARAM_CH_CNT) @@ -888,9 +887,9 @@ static inline bool ieee80211_mle_size_ok(const u8 *data, size_t len) common += sizeof(struct ieee80211_mle_preq_common_info); if (control & IEEE80211_MLC_PREQ_PRES_MLD_ID) common += 1; - check_common_len = true; break; case IEEE80211_ML_CONTROL_TYPE_RECONF: + common += 1; if (control & IEEE80211_MLC_RECONF_PRES_MLD_MAC_ADDR) common += ETH_ALEN; if (control & IEEE80211_MLC_RECONF_PRES_EML_CAPA) @@ -902,7 +901,6 @@ static inline bool ieee80211_mle_size_ok(const u8 *data, size_t len) break; case IEEE80211_ML_CONTROL_TYPE_TDLS: common += sizeof(struct ieee80211_mle_tdls_common_info); - check_common_len = true; break; case IEEE80211_ML_CONTROL_TYPE_PRIO_ACCESS: common = ETH_ALEN + 1; @@ -915,11 +913,9 @@ static inline bool ieee80211_mle_size_ok(const u8 *data, size_t len) if (len < fixed + common) return false; - if (!check_common_len) - return true; + common_len = mle->variable[0]; - /* if present, common length is the first octet there */ - return mle->variable[0] >= common; + return common_len >= common && common_len <= len - fixed; } /** diff --git a/include/linux/skmsg.h b/include/linux/skmsg.h index a8553401b1c9..d5e35f24738d 100644 --- a/include/linux/skmsg.h +++ b/include/linux/skmsg.h @@ -551,20 +551,6 @@ static inline void psock_progs_drop(struct sk_psock_progs *progs) psock_set_prog(&progs->skb_verdict, NULL); } -/* for tcp only, sk is locked */ -static inline ssize_t sk_psock_msg_inq(struct sock *sk) -{ - struct sk_psock *psock; - ssize_t inq = 0; - - psock = sk_psock_get(sk); - if (likely(psock)) { - inq = sk_psock_get_msg_len_nolock(psock); - sk_psock_put(sk, psock); - } - return inq; -} - /* for udp only, sk is not locked */ static inline ssize_t sk_msg_first_len(struct sock *sk) { diff --git a/include/net/bluetooth/hci_core.h b/include/net/bluetooth/hci_core.h index 4ca09298e11a..e7133ff87fbf 100644 --- a/include/net/bluetooth/hci_core.h +++ b/include/net/bluetooth/hci_core.h @@ -2430,6 +2430,7 @@ void mgmt_new_link_key(struct hci_dev *hdev, struct link_key *key, bool persistent); void mgmt_device_connected(struct hci_dev *hdev, struct hci_conn *conn, u8 *name, u8 name_len); +u8 hci_to_mgmt_reason(u8 err); void mgmt_device_disconnected(struct hci_dev *hdev, bdaddr_t *bdaddr, u8 link_type, u8 addr_type, u8 reason, bool mgmt_connected); diff --git a/include/net/cfg80211.h b/include/net/cfg80211.h index 8188ad200de5..f5abf1db7558 100644 --- a/include/net/cfg80211.h +++ b/include/net/cfg80211.h @@ -7228,7 +7228,7 @@ struct wireless_dev { enum ieee80211_bss_type conn_bss_type; u32 conn_owner_nlportid; - struct work_struct disconnect_wk; + struct wiphy_work disconnect_wk; u8 disconnect_bssid[ETH_ALEN]; struct list_head event_list; @@ -7265,7 +7265,7 @@ struct wireless_dev { struct list_head pmsr_list; spinlock_t pmsr_lock; - struct work_struct pmsr_free_wk; + struct wiphy_work pmsr_free_wk; unsigned long unprot_beacon_reported; diff --git a/include/net/sctp/structs.h b/include/net/sctp/structs.h index affee44bd38e..cccc662561aa 100644 --- a/include/net/sctp/structs.h +++ b/include/net/sctp/structs.h @@ -312,7 +312,8 @@ struct sctp_cookie { __u8 auth_random[sizeof(struct sctp_paramhdr) + SCTP_AUTH_RANDOM_LENGTH]; - __u8 auth_hmacs[SCTP_AUTH_NUM_HMACS * sizeof(__u16) + 2]; + __u8 auth_hmacs[sizeof(struct sctp_paramhdr) + + SCTP_AUTH_NUM_HMACS * sizeof(__u16)]; __u8 auth_chunks[sizeof(struct sctp_paramhdr) + SCTP_AUTH_MAX_CHUNKS]; /* This is a shim for my peer's INIT packet, followed by diff --git a/include/net/xfrm.h b/include/net/xfrm.h index 519a0156a05c..a6d69aaa6cd2 100644 --- a/include/net/xfrm.h +++ b/include/net/xfrm.h @@ -162,6 +162,8 @@ struct xfrm_dev_offload { */ struct net_device *real_dev; unsigned long offload_handle; + /* Snapshot the attached device index for dump paths. */ + int ifindex; u8 dir : 2; u8 type : 2; u8 flags : 2; diff --git a/include/scsi/scsi_device.h b/include/scsi/scsi_device.h index 029f5115b2ea..8694eeadd753 100644 --- a/include/scsi/scsi_device.h +++ b/include/scsi/scsi_device.h @@ -408,7 +408,6 @@ void scsi_attach_vpd(struct scsi_device *sdev); void scsi_cdl_check(struct scsi_device *sdev); int scsi_cdl_enable(struct scsi_device *sdev, bool enable); -extern struct scsi_device *scsi_device_from_queue(struct request_queue *q); extern int __must_check scsi_device_get(struct scsi_device *); extern void scsi_device_put(struct scsi_device *); extern struct scsi_device *scsi_device_lookup(struct Scsi_Host *, diff --git a/include/scsi/scsi_host.h b/include/scsi/scsi_host.h index 7e2011830ba4..f6b286fa59f2 100644 --- a/include/scsi/scsi_host.h +++ b/include/scsi/scsi_host.h @@ -750,6 +750,9 @@ struct Scsi_Host { */ struct device *dma_dev; + /* Used for an rcu-synchronizing eh wakeup */ + struct work_struct eh_work; + /* Delay for runtime autosuspend */ int rpm_autosuspend_delay; diff --git a/include/soc/tegra/pmc.h b/include/soc/tegra/pmc.h index 4bcbf19d75ac..53f6d02889db 100644 --- a/include/soc/tegra/pmc.h +++ b/include/soc/tegra/pmc.h @@ -210,7 +210,6 @@ tegra_pmc_io_pad_power_disable(struct tegra_pmc *pmc, enum tegra_io_pad id) bool tegra_pmc_cpu_is_powered(unsigned int cpuid); int tegra_pmc_cpu_power_on(unsigned int cpuid); int tegra_pmc_cpu_remove_clamping(unsigned int cpuid); -bool tegra_pmc_core_domain_state_synced(void); #if defined(CONFIG_SOC_TEGRA_PMC) && defined(CONFIG_PM_SLEEP) enum tegra_suspend_mode tegra_pmc_get_suspend_mode(void); @@ -230,6 +229,10 @@ static inline void tegra_pmc_enter_suspend_mode(enum tegra_suspend_mode mode) { } #endif +#endif + +#if defined(CONFIG_ARM) && defined(CONFIG_SOC_TEGRA_PMC) +bool tegra_pmc_core_domain_state_synced(void); #else /* needed for COMPILE_TEST */ static inline bool tegra_pmc_core_domain_state_synced(void) diff --git a/include/sound/aw88399.h b/include/sound/aw88399.h new file mode 100644 index 000000000000..a1e0de6be8ea --- /dev/null +++ b/include/sound/aw88399.h @@ -0,0 +1,621 @@ +/* SPDX-License-Identifier: GPL-2.0-only + * + * linux/sound/aw88399.h -- Platform data for AW88399 + * + * Copyright (c) 2023 AWINIC Technology CO., LTD + * + * Author: Weidong Wang <wangweidong.a@awinic.com> + */ + +#ifndef __SOUND_AW88399_H +#define __SOUND_AW88399_H + +#include <linux/mutex.h> +#include <linux/workqueue.h> + +/* registers list */ +#define AW88399_ID_REG (0x00) +#define AW88399_SYSST_REG (0x01) +#define AW88399_SYSINT_REG (0x02) +#define AW88399_SYSINTM_REG (0x03) +#define AW88399_SYSCTRL_REG (0x04) +#define AW88399_SYSCTRL2_REG (0x05) +#define AW88399_I2SCTRL1_REG (0x06) +#define AW88399_I2SCTRL2_REG (0x07) +#define AW88399_I2SCTRL3_REG (0x08) +#define AW88399_DACCFG1_REG (0x09) +#define AW88399_DACCFG2_REG (0x0A) +#define AW88399_DACCFG3_REG (0x0B) +#define AW88399_DACCFG4_REG (0x0C) +#define AW88399_DACCFG5_REG (0x0D) +#define AW88399_DACCFG6_REG (0x0E) +#define AW88399_DACCFG7_REG (0x0F) +#define AW88399_MPDCFG1_REG (0x10) +#define AW88399_MPDCFG2_REG (0x11) +#define AW88399_MPDCFG3_REG (0x12) +#define AW88399_MPDCFG4_REG (0x13) +#define AW88399_PWMCTRL1_REG (0x14) +#define AW88399_PWMCTRL2_REG (0x15) +#define AW88399_PWMCTRL3_REG (0x16) +#define AW88399_I2SCFG1_REG (0x17) +#define AW88399_DBGCTRL_REG (0x18) +#define AW88399_HAGCST_REG (0x20) +#define AW88399_VBAT_REG (0x21) +#define AW88399_TEMP_REG (0x22) +#define AW88399_PVDD_REG (0x23) +#define AW88399_ISNDAT_REG (0x24) +#define AW88399_VSNDAT_REG (0x25) +#define AW88399_I2SINT_REG (0x26) +#define AW88399_I2SCAPCNT_REG (0x27) +#define AW88399_ANASTA1_REG (0x28) +#define AW88399_ANASTA2_REG (0x29) +#define AW88399_ANASTA3_REG (0x2A) +#define AW88399_TESTDET_REG (0x2B) +#define AW88399_DSMCFG1_REG (0x30) +#define AW88399_DSMCFG2_REG (0x31) +#define AW88399_DSMCFG3_REG (0x32) +#define AW88399_DSMCFG4_REG (0x33) +#define AW88399_DSMCFG5_REG (0x34) +#define AW88399_DSMCFG6_REG (0x35) +#define AW88399_DSMCFG7_REG (0x36) +#define AW88399_DSMCFG8_REG (0x37) +#define AW88399_TESTIN_REG (0x38) +#define AW88399_TESTOUT_REG (0x39) +#define AW88399_MEMTEST_REG (0x3A) +#define AW88399_VSNCTRL1_REG (0x3B) +#define AW88399_ISNCTRL1_REG (0x3C) +#define AW88399_ISNCTRL2_REG (0x3D) +#define AW88399_DSPMADD_REG (0x40) +#define AW88399_DSPMDAT_REG (0x41) +#define AW88399_WDT_REG (0x42) +#define AW88399_ACR1_REG (0x43) +#define AW88399_ACR2_REG (0x44) +#define AW88399_ASR1_REG (0x45) +#define AW88399_ASR2_REG (0x46) +#define AW88399_DSPCFG_REG (0x47) +#define AW88399_ASR3_REG (0x48) +#define AW88399_ASR4_REG (0x49) +#define AW88399_DSPVCALB_REG (0x4A) +#define AW88399_CRCCTRL_REG (0x4B) +#define AW88399_DSPDBG1_REG (0x4C) +#define AW88399_DSPDBG2_REG (0x4D) +#define AW88399_DSPDBG3_REG (0x4E) +#define AW88399_PLLCTRL1_REG (0x50) +#define AW88399_PLLCTRL2_REG (0x51) +#define AW88399_PLLCTRL3_REG (0x52) +#define AW88399_CDACTRL1_REG (0x53) +#define AW88399_CDACTRL2_REG (0x54) +#define AW88399_CDACTRL3_REG (0x55) +#define AW88399_SADCCTRL1_REG (0x56) +#define AW88399_SADCCTRL2_REG (0x57) +#define AW88399_BOPCTRL1_REG (0x58) +#define AW88399_BOPCTRL2_REG (0x5A) +#define AW88399_BOPCTRL3_REG (0x5B) +#define AW88399_BOPCTRL4_REG (0x5C) +#define AW88399_BOPCTRL5_REG (0x5D) +#define AW88399_BOPCTRL6_REG (0x5E) +#define AW88399_BOPCTRL7_REG (0x5F) +#define AW88399_BSTCTRL1_REG (0x60) +#define AW88399_BSTCTRL2_REG (0x61) +#define AW88399_BSTCTRL3_REG (0x62) +#define AW88399_BSTCTRL4_REG (0x63) +#define AW88399_BSTCTRL5_REG (0x64) +#define AW88399_BSTCTRL6_REG (0x65) +#define AW88399_BSTCTRL7_REG (0x66) +#define AW88399_BSTCTRL8_REG (0x67) +#define AW88399_BSTCTRL9_REG (0x68) +#define AW88399_BSTCTRL10_REG (0x69) +#define AW88399_CPCTRL_REG (0x6A) +#define AW88399_EFWH_REG (0x6C) +#define AW88399_EFWM2_REG (0x6D) +#define AW88399_EFWM1_REG (0x6E) +#define AW88399_EFWL_REG (0x6F) +#define AW88399_TESTCTRL1_REG (0x70) +#define AW88399_TESTCTRL2_REG (0x71) +#define AW88399_EFCTRL1_REG (0x72) +#define AW88399_EFCTRL2_REG (0x73) +#define AW88399_EFRH4_REG (0x74) +#define AW88399_EFRH3_REG (0x75) +#define AW88399_EFRH2_REG (0x76) +#define AW88399_EFRH1_REG (0x77) +#define AW88399_EFRL4_REG (0x78) +#define AW88399_EFRL3_REG (0x79) +#define AW88399_EFRL2_REG (0x7A) +#define AW88399_EFRL1_REG (0x7B) +#define AW88399_TM_REG (0x7C) +#define AW88399_TM2_REG (0x7D) + +#define AW88399_REG_MAX (0x7E) +#define AW88399_MUTE_VOL (1023) + +#define AW88399_DSP_CFG_ADDR (0x9B00) +#define AW88399_DSP_REG_CFG_ADPZ_RA (0x9B68) +#define AW88399_DSP_FW_ADDR (0x8980) +#define AW88399_DSP_ROM_CHECK_ADDR (0x1F40) +#define AW88399_DSP_ROM_CHECK_DATA (0x4638) + +#define AW88399_CALI_RE_HBITS_MASK (~(0xFFFF0000)) +#define AW88399_CALI_RE_HBITS_SHIFT (16) + +#define AW88399_CALI_RE_LBITS_MASK (~(0xFFFF)) +#define AW88399_CALI_RE_LBITS_SHIFT (0) + +#define AW88399_I2STXEN_START_BIT (9) +#define AW88399_I2STXEN_BITS_LEN (1) +#define AW88399_I2STXEN_MASK \ + (~(((1<<AW88399_I2STXEN_BITS_LEN)-1) << AW88399_I2STXEN_START_BIT)) + +#define AW88399_I2STXEN_DISABLE (0) +#define AW88399_I2STXEN_DISABLE_VALUE \ + (AW88399_I2STXEN_DISABLE << AW88399_I2STXEN_START_BIT) + +#define AW88399_I2STXEN_ENABLE (1) +#define AW88399_I2STXEN_ENABLE_VALUE \ + (AW88399_I2STXEN_ENABLE << AW88399_I2STXEN_START_BIT) + +#define AW88399_VOL_START_BIT (0) +#define AW88399_VOL_BITS_LEN (10) +#define AW88399_VOL_MASK \ + (~(((1<<AW88399_VOL_BITS_LEN)-1) << AW88399_VOL_START_BIT)) + +#define AW88399_PWDN_START_BIT (0) +#define AW88399_PWDN_BITS_LEN (1) +#define AW88399_PWDN_MASK \ + (~(((1<<AW88399_PWDN_BITS_LEN)-1) << AW88399_PWDN_START_BIT)) + +#define AW88399_PWDN_POWER_DOWN (1) +#define AW88399_PWDN_POWER_DOWN_VALUE \ + (AW88399_PWDN_POWER_DOWN << AW88399_PWDN_START_BIT) + +#define AW88399_PWDN_WORKING (0) +#define AW88399_PWDN_WORKING_VALUE \ + (AW88399_PWDN_WORKING << AW88399_PWDN_START_BIT) + +#define AW88399_DSPBY_START_BIT (2) +#define AW88399_DSPBY_BITS_LEN (1) +#define AW88399_DSPBY_MASK \ + (~(((1<<AW88399_DSPBY_BITS_LEN)-1) << AW88399_DSPBY_START_BIT)) + +#define AW88399_DSPBY_WORKING (0) +#define AW88399_DSPBY_WORKING_VALUE \ + (AW88399_DSPBY_WORKING << AW88399_DSPBY_START_BIT) + +#define AW88399_DSPBY_BYPASS (1) +#define AW88399_DSPBY_BYPASS_VALUE \ + (AW88399_DSPBY_BYPASS << AW88399_DSPBY_START_BIT) + +#define AW88399_MEM_CLKSEL_START_BIT (3) +#define AW88399_MEM_CLKSEL_BITS_LEN (1) +#define AW88399_MEM_CLKSEL_MASK \ + (~(((1<<AW88399_MEM_CLKSEL_BITS_LEN)-1) << AW88399_MEM_CLKSEL_START_BIT)) + +#define AW88399_MEM_CLKSEL_OSCCLK (0) +#define AW88399_MEM_CLKSEL_OSCCLK_VALUE \ + (AW88399_MEM_CLKSEL_OSCCLK << AW88399_MEM_CLKSEL_START_BIT) + +#define AW88399_MEM_CLKSEL_DAPHCLK (1) +#define AW88399_MEM_CLKSEL_DAPHCLK_VALUE \ + (AW88399_MEM_CLKSEL_DAPHCLK << AW88399_MEM_CLKSEL_START_BIT) + +#define AW88399_DITHER_EN_START_BIT (15) +#define AW88399_DITHER_EN_BITS_LEN (1) +#define AW88399_DITHER_EN_MASK \ + (~(((1<<AW88399_DITHER_EN_BITS_LEN)-1) << AW88399_DITHER_EN_START_BIT)) + +#define AW88399_DITHER_EN_DISABLE (0) +#define AW88399_DITHER_EN_DISABLE_VALUE \ + (AW88399_DITHER_EN_DISABLE << AW88399_DITHER_EN_START_BIT) + +#define AW88399_DITHER_EN_ENABLE (1) +#define AW88399_DITHER_EN_ENABLE_VALUE \ + (AW88399_DITHER_EN_ENABLE << AW88399_DITHER_EN_START_BIT) + +#define AW88399_HMUTE_START_BIT (8) +#define AW88399_HMUTE_BITS_LEN (1) +#define AW88399_HMUTE_MASK \ + (~(((1<<AW88399_HMUTE_BITS_LEN)-1) << AW88399_HMUTE_START_BIT)) + +#define AW88399_HMUTE_DISABLE (0) +#define AW88399_HMUTE_DISABLE_VALUE \ + (AW88399_HMUTE_DISABLE << AW88399_HMUTE_START_BIT) + +#define AW88399_HMUTE_ENABLE (1) +#define AW88399_HMUTE_ENABLE_VALUE \ + (AW88399_HMUTE_ENABLE << AW88399_HMUTE_START_BIT) + +#define AW88399_EF_DBMD_START_BIT (2) +#define AW88399_EF_DBMD_BITS_LEN (1) +#define AW88399_EF_DBMD_MASK \ + (~(((1<<AW88399_EF_DBMD_BITS_LEN)-1) << AW88399_EF_DBMD_START_BIT)) + +#define AW88399_EF_DBMD_OR (1) +#define AW88399_EF_DBMD_OR_VALUE \ + (AW88399_EF_DBMD_OR << AW88399_EF_DBMD_START_BIT) + +#define AW88399_VDSEL_START_BIT (5) +#define AW88399_VDSEL_BITS_LEN (1) +#define AW88399_VDSEL_MASK \ + (~(((1<<AW88399_VDSEL_BITS_LEN)-1) << AW88399_VDSEL_START_BIT)) + +#define AW88399_EF_ISN_GESLP_H_START_BIT (0) +#define AW88399_EF_ISN_GESLP_H_BITS_LEN (10) +#define AW88399_EF_ISN_GESLP_H_MASK \ + (~(((1<<AW88399_EF_ISN_GESLP_H_BITS_LEN)-1) << AW88399_EF_ISN_GESLP_H_START_BIT)) + +/* EF_VSN_GESLP_H bit 9:0 (EFRH3 0x75) */ +#define AW88399_EF_VSN_GESLP_H_START_BIT (0) +#define AW88399_EF_VSN_GESLP_H_BITS_LEN (10) +#define AW88399_EF_VSN_GESLP_H_MASK \ + (~(((1<<AW88399_EF_VSN_GESLP_H_BITS_LEN)-1) << AW88399_EF_VSN_GESLP_H_START_BIT)) + +#define AW88399_EF_ISN_GESLP_L_START_BIT (0) +#define AW88399_EF_ISN_GESLP_L_BITS_LEN (10) +#define AW88399_EF_ISN_GESLP_L_MASK \ + (~(((1<<AW88399_EF_ISN_GESLP_L_BITS_LEN)-1) << AW88399_EF_ISN_GESLP_L_START_BIT)) + +/* EF_VSN_GESLP_L bit 9:0 (EFRL3 0x79) */ +#define AW88399_EF_VSN_GESLP_L_START_BIT (0) +#define AW88399_EF_VSN_GESLP_L_BITS_LEN (10) +#define AW88399_EF_VSN_GESLP_L_MASK \ + (~(((1<<AW88399_EF_VSN_GESLP_L_BITS_LEN)-1) << AW88399_EF_VSN_GESLP_L_START_BIT)) + +#define AW88399_INTERNAL_VSN_TRIM_H_START_BIT (9) +#define AW88399_INTERNAL_VSN_TRIM_H_BITS_LEN (6) +#define AW88399_INTERNAL_VSN_TRIM_H_MASK \ + (~(((1<<AW88399_INTERNAL_VSN_TRIM_H_BITS_LEN)-1) << AW88399_INTERNAL_VSN_TRIM_H_START_BIT)) + +#define AW88399_INTERNAL_VSN_TRIM_L_START_BIT (9) +#define AW88399_INTERNAL_VSN_TRIM_L_BITS_LEN (6) +#define AW88399_INTERNAL_VSN_TRIM_L_MASK \ + (~(((1<<AW88399_INTERNAL_VSN_TRIM_L_BITS_LEN)-1) << AW88399_INTERNAL_VSN_TRIM_L_START_BIT)) + +#define AW88399_RCV_MODE_START_BIT (7) +#define AW88399_RCV_MODE_BITS_LEN (1) +#define AW88399_RCV_MODE_MASK \ + (~(((1<<AW88399_RCV_MODE_BITS_LEN)-1) << AW88399_RCV_MODE_START_BIT)) + +#define AW88399_CLKI_START_BIT (4) +#define AW88399_NOCLKI_START_BIT (5) +#define AW88399_PLLI_START_BIT (0) +#define AW88399_PLLI_INT_VALUE (1) +#define AW88399_PLLI_INT_INTERRUPT \ + (AW88399_PLLI_INT_VALUE << AW88399_PLLI_START_BIT) + +#define AW88399_CLKI_INT_VALUE (1) +#define AW88399_CLKI_INT_INTERRUPT \ + (AW88399_CLKI_INT_VALUE << AW88399_CLKI_START_BIT) + +#define AW88399_NOCLKI_INT_VALUE (1) +#define AW88399_NOCLKI_INT_INTERRUPT \ + (AW88399_NOCLKI_INT_VALUE << AW88399_NOCLKI_START_BIT) + +#define AW88399_BIT_SYSINT_CHECK \ + (AW88399_PLLI_INT_INTERRUPT | \ + AW88399_CLKI_INT_INTERRUPT | \ + AW88399_NOCLKI_INT_INTERRUPT) + +#define AW88399_CRC_CHECK_START_BIT (12) +#define AW88399_CRC_CHECK_BITS_LEN (3) +#define AW88399_CRC_CHECK_BITS_MASK \ + (~(((1<<AW88399_CRC_CHECK_BITS_LEN)-1) << AW88399_CRC_CHECK_START_BIT)) + +#define AW88399_RCV_MODE_RECEIVER (1) +#define AW88399_RCV_MODE_RECEIVER_VALUE \ + (AW88399_RCV_MODE_RECEIVER << AW88399_RCV_MODE_START_BIT) + +#define AW88399_AMPPD_START_BIT (1) +#define AW88399_AMPPD_BITS_LEN (1) +#define AW88399_AMPPD_MASK \ + (~(((1<<AW88399_AMPPD_BITS_LEN)-1) << AW88399_AMPPD_START_BIT)) + +#define AW88399_AMPPD_WORKING (0) +#define AW88399_AMPPD_WORKING_VALUE \ + (AW88399_AMPPD_WORKING << AW88399_AMPPD_START_BIT) + +#define AW88399_AMPPD_POWER_DOWN (1) +#define AW88399_AMPPD_POWER_DOWN_VALUE \ + (AW88399_AMPPD_POWER_DOWN << AW88399_AMPPD_START_BIT) + +#define AW88399_RAM_CG_BYP_START_BIT (0) +#define AW88399_RAM_CG_BYP_BITS_LEN (1) +#define AW88399_RAM_CG_BYP_MASK \ + (~(((1<<AW88399_RAM_CG_BYP_BITS_LEN)-1) << AW88399_RAM_CG_BYP_START_BIT)) + +#define AW88399_RAM_CG_BYP_WORK (0) +#define AW88399_RAM_CG_BYP_WORK_VALUE \ + (AW88399_RAM_CG_BYP_WORK << AW88399_RAM_CG_BYP_START_BIT) + +#define AW88399_RAM_CG_BYP_BYPASS (1) +#define AW88399_RAM_CG_BYP_BYPASS_VALUE \ + (AW88399_RAM_CG_BYP_BYPASS << AW88399_RAM_CG_BYP_START_BIT) + +#define AW88399_CRC_END_ADDR_START_BIT (0) +#define AW88399_CRC_END_ADDR_BITS_LEN (12) +#define AW88399_CRC_END_ADDR_MASK \ + (~(((1<<AW88399_CRC_END_ADDR_BITS_LEN)-1) << AW88399_CRC_END_ADDR_START_BIT)) + +#define AW88399_CRC_CODE_EN_START_BIT (13) +#define AW88399_CRC_CODE_EN_BITS_LEN (1) +#define AW88399_CRC_CODE_EN_MASK \ + (~(((1<<AW88399_CRC_CODE_EN_BITS_LEN)-1) << AW88399_CRC_CODE_EN_START_BIT)) + +#define AW88399_CRC_CODE_EN_DISABLE (0) +#define AW88399_CRC_CODE_EN_DISABLE_VALUE \ + (AW88399_CRC_CODE_EN_DISABLE << AW88399_CRC_CODE_EN_START_BIT) + +#define AW88399_CRC_CODE_EN_ENABLE (1) +#define AW88399_CRC_CODE_EN_ENABLE_VALUE \ + (AW88399_CRC_CODE_EN_ENABLE << AW88399_CRC_CODE_EN_START_BIT) + +#define AW88399_CRC_CFG_EN_START_BIT (12) +#define AW88399_CRC_CFG_EN_BITS_LEN (1) +#define AW88399_CRC_CFG_EN_MASK \ + (~(((1<<AW88399_CRC_CFG_EN_BITS_LEN)-1) << AW88399_CRC_CFG_EN_START_BIT)) + +#define AW88399_CRC_CFG_EN_DISABLE (0) +#define AW88399_CRC_CFG_EN_DISABLE_VALUE \ + (AW88399_CRC_CFG_EN_DISABLE << AW88399_CRC_CFG_EN_START_BIT) + +#define AW88399_CRC_CFG_EN_ENABLE (1) +#define AW88399_CRC_CFG_EN_ENABLE_VALUE \ + (AW88399_CRC_CFG_EN_ENABLE << AW88399_CRC_CFG_EN_START_BIT) + +#define AW88399_OCDS_START_BIT (3) +#define AW88399_OCDS_OC (1) +#define AW88399_OCDS_OC_VALUE \ + (AW88399_OCDS_OC << AW88399_OCDS_START_BIT) + +#define AW88399_NOCLKS_START_BIT (5) +#define AW88399_NOCLKS_NO_CLOCK (1) +#define AW88399_NOCLKS_NO_CLOCK_VALUE \ + (AW88399_NOCLKS_NO_CLOCK << AW88399_NOCLKS_START_BIT) + +#define AW88399_SWS_START_BIT (8) +#define AW88399_SWS_SWITCHING (1) +#define AW88399_SWS_SWITCHING_VALUE \ + (AW88399_SWS_SWITCHING << AW88399_SWS_START_BIT) + +#define AW88399_BSTS_START_BIT (9) +#define AW88399_BSTS_FINISHED (1) +#define AW88399_BSTS_FINISHED_VALUE \ + (AW88399_BSTS_FINISHED << AW88399_BSTS_START_BIT) + +#define AW88399_UVLS_START_BIT (14) +#define AW88399_UVLS_NORMAL (0) +#define AW88399_UVLS_NORMAL_VALUE \ + (AW88399_UVLS_NORMAL << AW88399_UVLS_START_BIT) + +#define AW88399_BSTOCS_START_BIT (11) +#define AW88399_BSTOCS_OVER_CURRENT (1) +#define AW88399_BSTOCS_OVER_CURRENT_VALUE \ + (AW88399_BSTOCS_OVER_CURRENT << AW88399_BSTOCS_START_BIT) + +#define AW88399_OTHS_START_BIT (1) +#define AW88399_OTHS_OT (1) +#define AW88399_OTHS_OT_VALUE \ + (AW88399_OTHS_OT << AW88399_OTHS_START_BIT) + +#define AW88399_PLLS_START_BIT (0) +#define AW88399_PLLS_LOCKED (1) +#define AW88399_PLLS_LOCKED_VALUE \ + (AW88399_PLLS_LOCKED << AW88399_PLLS_START_BIT) + +#define AW88399_CLKS_START_BIT (4) +#define AW88399_CLKS_STABLE (1) +#define AW88399_CLKS_STABLE_VALUE \ + (AW88399_CLKS_STABLE << AW88399_CLKS_START_BIT) + +#define AW88399_BIT_PLL_CHECK \ + (AW88399_CLKS_STABLE_VALUE | \ + AW88399_PLLS_LOCKED_VALUE) + +#define AW88399_BIT_SYSST_CHECK_MASK \ + (~(AW88399_UVLS_NORMAL_VALUE | \ + AW88399_BSTOCS_OVER_CURRENT_VALUE | \ + AW88399_BSTS_FINISHED_VALUE | \ + AW88399_SWS_SWITCHING_VALUE | \ + AW88399_NOCLKS_NO_CLOCK_VALUE | \ + AW88399_CLKS_STABLE_VALUE | \ + AW88399_OCDS_OC_VALUE | \ + AW88399_OTHS_OT_VALUE | \ + AW88399_PLLS_LOCKED_VALUE)) + +#define AW88399_BIT_SYSST_NOSWS_CHECK \ + (AW88399_BSTS_FINISHED_VALUE | \ + AW88399_CLKS_STABLE_VALUE | \ + AW88399_PLLS_LOCKED_VALUE) + +#define AW88399_BIT_SYSST_SWS_CHECK \ + (AW88399_BSTS_FINISHED_VALUE | \ + AW88399_CLKS_STABLE_VALUE | \ + AW88399_PLLS_LOCKED_VALUE | \ + AW88399_SWS_SWITCHING_VALUE) + +#define AW88399_CCO_MUX_START_BIT (14) +#define AW88399_CCO_MUX_BITS_LEN (1) +#define AW88399_CCO_MUX_MASK \ + (~(((1<<AW88399_CCO_MUX_BITS_LEN)-1) << AW88399_CCO_MUX_START_BIT)) + +#define AW88399_CCO_MUX_DIVIDED (0) +#define AW88399_CCO_MUX_DIVIDED_VALUE \ + (AW88399_CCO_MUX_DIVIDED << AW88399_CCO_MUX_START_BIT) + +#define AW88399_CCO_MUX_BYPASS (1) +#define AW88399_CCO_MUX_BYPASS_VALUE \ + (AW88399_CCO_MUX_BYPASS << AW88399_CCO_MUX_START_BIT) + +#define AW88399_NOISE_GATE_EN_START_BIT (13) +#define AW88399_NOISE_GATE_EN_BITS_LEN (1) +#define AW88399_NOISE_GATE_EN_MASK \ + (~(((1<<AW88399_NOISE_GATE_EN_BITS_LEN)-1) << AW88399_NOISE_GATE_EN_START_BIT)) + +#define AW88399_WDT_CNT_START_BIT (0) +#define AW88399_WDT_CNT_BITS_LEN (8) +#define AW88399_WDT_CNT_MASK \ + (~(((1<<AW88399_WDT_CNT_BITS_LEN)-1) << AW88399_WDT_CNT_START_BIT)) + +#define AW88399_REABS_START_BIT (3) +#define AW88399_REABS_BITS_LEN (1) +#define AW88399_REABS_MASK \ + (~(((1<<AW88399_REABS_BITS_LEN)-1) << AW88399_REABS_START_BIT)) + +#define AW88399_DSP_VOL_START_BIT (8) +#define AW88399_DSP_VOL_BITS_LEN (8) +#define AW88399_DSP_VOL_MASK \ + (~(((1<<AW88399_DSP_VOL_BITS_LEN)-1) << AW88399_DSP_VOL_START_BIT)) + +#define AW883XX_DSP_NG_EN_START (13) +#define AW883XX_DSP_NG_EN_LEN (1) +#define AW883XX_DSP_NG_EN_MASK \ + (~(((1 << AW883XX_DSP_NG_EN_LEN) - 1) << AW883XX_DSP_NG_EN_START)) +#define AW883XX_DSP_NG_EN_DISABLE (0) +#define AW883XX_DSP_NG_EN_DISABLE_VALUE \ + (AW883XX_DSP_NG_EN_DISABLE << AW883XX_DSP_NG_EN_START) + +#define AW88399_VOLUME_STEP_DB (64) +#define AW88399_VOL_DEFAULT_VALUE (0) +#define AW88399_DSP_ODD_NUM_BIT_TEST (0x5555) +#define AW88399_EF_ISN_GESLP_SIGN_MASK (~(1 << 9)) +#define AW88399_EF_ISN_GESLP_SIGN_NEG (0xfe00) + +#define AW88399_EF_VSN_GESLP_SIGN_MASK (~(1 << 9)) +#define AW88399_EF_VSN_GESLP_SIGN_NEG (0xfe00) + +#define AW88399_TEM4_SIGN_MASK (~(1 << 5)) +#define AW88399_TEM4_SIGN_NEG (0xffc0) + +#define AW88399_ICABLK_FACTOR (1) +#define AW88399_VCABLK_FACTOR (1) +#define AW88399_VCABLK_DAC_FACTOR (2) + +#define AW88399_VCALB_ADJ_FACTOR (12) +#define AW88399_VCALB_ACCURACY (1 << 12) + +#define AW88399_ISCAL_FACTOR (3125) +#define AW88399_VSCAL_FACTOR (18875) +#define AW88399_ISCAL_DAC_FACTOR (3125) +#define AW88399_VSCAL_DAC_FACTOR (12600) +#define AW88399_CABL_BASE_VALUE (1000) + +#define AW88399_DEV_DEFAULT_CH (0) +#define AW88399_DEV_DSP_CHECK_MAX (5) +#define AW88399_MAX_RAM_WRITE_BYTE_SIZE (128) +#define AW88399_DSP_RE_SHIFT (12) +#define AW88399_CALI_RE_MAX (15000) +#define AW88399_CALI_RE_MIN (4000) +#define AW_FW_ADDR_LEN (4) +#define AW88399_DSP_RE_TO_SHOW_RE(re, shift) (((re) * (1000)) >> (shift)) +#define AW88399_SHOW_RE_TO_DSP_RE(re, shift) (((re) << shift) / (1000)) +#define AW88399_CRC_CHECK_PASS_VAL (0x4) + +#define AW88399_CRC_CFG_BASE_ADDR (0xD80) +#define AW88399_CRC_FW_BASE_ADDR (0x4C0) +#define AW88399_ACF_FILE "aw88399_acf.bin" +#define AW88399_DEV_SYSST_CHECK_MAX (10) +#define AW88399_CHIP_ID 0x2183 + +#define AW88399_START_RETRIES (5) +#define AW88399_START_WORK_DELAY_MS (0) + +enum { + AW_EF_AND_CHECK = 0, + AW_EF_OR_CHECK, +}; + +enum { + AW88399_DEV_VDSEL_DAC = 0, + AW88399_DEV_VDSEL_VSENSE = 32, +}; + +enum { + AW88399_DSP_CRC_NA = 0, + AW88399_DSP_CRC_OK = 1, +}; + +enum { + AW88399_DSP_FW_UPDATE_OFF = 0, + AW88399_DSP_FW_UPDATE_ON = 1, +}; + +enum { + AW88399_FORCE_UPDATE_OFF = 0, + AW88399_FORCE_UPDATE_ON = 1, +}; + +enum { + AW88399_1000_US = 1000, + AW88399_2000_US = 2000, + AW88399_3000_US = 3000, + AW88399_4000_US = 4000, +}; + +enum AW88399_DEV_STATUS { + AW88399_DEV_PW_OFF = 0, + AW88399_DEV_PW_ON, +}; + +enum AW88399_DEV_FW_STATUS { + AW88399_DEV_FW_FAILED = 0, + AW88399_DEV_FW_OK, +}; + +enum AW88399_DEV_MEMCLK { + AW88399_DEV_MEMCLK_OSC = 0, + AW88399_DEV_MEMCLK_PLL = 1, +}; + +enum AW88399_DEV_DSP_CFG { + AW88399_DEV_DSP_WORK = 0, + AW88399_DEV_DSP_BYPASS = 1, +}; + +enum { + AW88399_NOT_RCV_MODE = 0, + AW88399_RCV_MODE = 1, +}; + +enum { + AW88399_SYNC_START = 0, + AW88399_ASYNC_START, +}; + +struct aw_device; +struct aw_container; +struct aw_cali_desc; +struct gpio_desc; +struct i2c_client; +struct regmap; + +struct aw88399 { + struct aw_device *aw_pa; + struct mutex lock; + struct gpio_desc *reset_gpio; + struct delayed_work start_work; + struct regmap *regmap; + struct aw_container *aw_cfg; + + unsigned int check_val; + unsigned int crc_init_val; + unsigned int vcalb_init_val; + unsigned int dither_st; + bool bsts_unreliable; + bool fw_needs_reload; +}; + +int aw_dev_check_syspll(struct aw_device *aw_dev); +void aw_dev_dsp_enable(struct aw_device *aw_dev, bool is_enable); +int aw_dev_get_dsp_status(struct aw_device *aw_dev); +int aw_dev_set_volume(struct aw_device *aw_dev, unsigned int value); +int aw_dev_update_cali_re(struct aw_cali_desc *cali_desc); +int aw88399_dev_get_prof_name(struct aw_device *aw_dev, int index, char **prof_name); +void aw88399_dev_mute(struct aw_device *aw_dev, bool is_mute); +void aw88399_dev_set_channel(struct aw88399 *aw88399, int channel); +void aw88399_hw_reset(struct aw88399 *aw88399); +int aw88399_init(struct aw88399 *aw88399, struct i2c_client *i2c, struct regmap *regmap); +extern const struct regmap_config aw88399_remap_config; +int aw88399_request_firmware_file(struct aw88399 *aw88399); +void aw88399_start(struct aw88399 *aw88399, bool sync_start); +void aw88399_startup_work(struct work_struct *work); +int aw88399_stop(struct aw_device *aw_dev); + +#endif /* __SOUND_AW88399_H */ |