Merge tag 'drm-intel-next-2026-07-02' of https://gitlab.freedesktop.org/drm/i915/kernel into drm-next

drm/i915 feature pull for v7.3:

Features and functionality:
- Novalake (NVL, display versio 35) Common Mode Timing Generator (CMTG) enabling (Animesh)
- NVL DC3CO enabling (Dibin)

Refactoring and cleanups:
- Refactor and document DP link recovery and capability tracking (Imre)
- i915 and xe driver display probe/remove/suspend/resume/shutdown cleanup and unification (Jani)
- Clean up bandwidth/SAGV code (Ville)
- Streamline Pre/Post-CSC LUT loops (Jani)
- Remove unused TGL DC3DO support (Dibin)
- Make read-only array rates static const (Colin Ian King)
- CDCLK sanitization improvements and cleanups (Ville)
- Break i915 and xe panic dependency on struct intel_framebuffer (Jani)
- GPIO pin renames and cleanups (Ville)
- Unify generic irq handler error messages (Jonathan)

Fixes:
- Various color pipeline fixes (Chaitanya)
- Fix step discontinuity in Pre/Post-CSC Gamma LUT (Sean Paul)
- Improve refresh rate changes without full modeset on VRR capable eDP (Ville)
- Display suspend/resume fixes (Imre)
- Fix LPE audio irq for PREEMPT-RT (Maarten)
- Fix HDMI scrambling enable (Jerome Tollet)
- LNL bandwidth buddy programming update (Vinod)
- Streamline display register wait timeouts (Ville)
- Fix DP MSA VTotal (Mitul)
- Fix LTPHY SSC enabling (Suraj)
- Fix LOBF requirements with optimized guardband (Ankit)
- Avoid full modeset for LRR vsync changes (Ankit)
- Fix vtotal-vsync distance when adjusting vtotal for lower refresh rate (Ankit)
- Extend VRR safe window wait for default VRR timing generator usage (Ankit)

Merges:
- Backmerge for v7.2-rc1 (Jani)

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Jani Nikula <jani.nikula@intel.com>
Link: https://patch.msgid.link/934cacdbf2a37856eb5cd6337d8774b449405bd8@intel.com

3 files changed, 4 insertions, 3 deletions

diff --git a/include/drm/drm_modes.h b/include/drm/drm_modes.h
index b9bb92e4b029..6e3eccc3c349 100644
--- a/include/drm/drm_modes.h
+++ b/include/drm/drm_modes.h
@@ -193,6 +193,7 @@ enum drm_mode_status {
 #define DRM_MODE_MATCH_FLAGS (1 << 2)
 #define DRM_MODE_MATCH_3D_FLAGS (1 << 3)
 #define DRM_MODE_MATCH_ASPECT_RATIO (1 << 4)
+#define DRM_MODE_MATCH_TIMINGS_VRR (1 << 5)
 
 /**
  * struct drm_display_mode - DRM kernel-internal display mode structure
diff --git a/include/drm/intel/display_parent_interface.h b/include/drm/intel/display_parent_interface.h
index 39991afeb173..de395df9ca30 100644
--- a/include/drm/intel/display_parent_interface.h
+++ b/include/drm/intel/display_parent_interface.h
@@ -167,7 +167,9 @@ struct intel_display_overlay_interface {
 
 struct intel_display_panic_interface {
 	struct intel_panic *(*alloc)(void);
-	int (*setup)(struct intel_panic *panic, struct drm_scanout_buffer *sb);
+	int (*setup)(struct intel_panic *panic, struct drm_scanout_buffer *sb,
+		     struct drm_gem_object *obj,
+		     unsigned int (*tiling)(unsigned int x, unsigned int y, unsigned int width));
 	void (*finish)(struct intel_panic *panic);
 };
 
diff --git a/include/drm/intel/mchbar_regs.h b/include/drm/intel/mchbar_regs.h
index ca0d421be16c..66498ca5e40b 100644
--- a/include/drm/intel/mchbar_regs.h
+++ b/include/drm/intel/mchbar_regs.h
@@ -6,8 +6,6 @@
 #ifndef __INTEL_MCHBAR_REGS__
 #define __INTEL_MCHBAR_REGS__
 
-#include "i915_reg_defs.h"
-
 /*
  * MCHBAR mirror.
  *