1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
|
// SPDX-License-Identifier: GPL-2.0
/*
* KVM guest debug register tests
*
* Copyright (C) 2020, Red Hat, Inc.
*/
#include <stdio.h>
#include <string.h>
#include "kvm_util.h"
#include "processor.h"
#include "apic.h"
#define DR6_BD (1 << 13)
#define DR7_GD (1 << 13)
#define IRQ_VECTOR 0xAA
#define CAST_TO_RIP(v) ((unsigned long long)&(v))
/* For testing data access debug BP */
u32 guest_value;
extern unsigned char sw_bp, hw_bp, write_data, ss_start, bd_start;
extern unsigned char fep_bd_start, fep_sti_start, fep_sti_end;
static int irqs_received;
static void guest_db_handler(struct ex_regs *regs)
{
static int count;
unsigned long target_rips[2] = {
CAST_TO_RIP(fep_sti_start),
CAST_TO_RIP(fep_sti_end),
};
__GUEST_ASSERT(regs->rip == target_rips[count],
"STI[%u]: unexpected rip 0x%lx (should be 0x%lx)",
count, regs->rip, target_rips[count]);
regs->rflags &= ~X86_EFLAGS_TF;
count++;
}
static void guest_irq_handler(struct ex_regs *regs)
{
/*
* The pending IRQ should finally be take when KVM_GUESTDBG_BLOCKIRQ is
* cleared and IRQs are enabled. Note, the IRQ is expected to arrive
* on the instruction immediately after STI, even though its in an STI
* shadow. Because the next instruction has a coincident #DB, and #DBs
* are not subject to STI-blocking, the #DB will push RFLAGS.IF=1 on
* the stack, and the eventual IRET will unmask IRQs and obliterate the
* STI shadow in the process.
*/
unsigned long target_rip = CAST_TO_RIP(fep_sti_start);
__GUEST_ASSERT(regs->rip == target_rip,
"IRQ: unexpected rip 0x%lx (should be 0x%lx)",
regs->rip, target_rip);
irqs_received++;
x2apic_write_reg(APIC_EOI, 0);
}
static void guest_code(void)
{
/* Create a pending interrupt on current vCPU */
x2apic_enable();
x2apic_write_reg(APIC_ICR, APIC_DEST_SELF | APIC_INT_ASSERT |
APIC_DM_FIXED | IRQ_VECTOR);
/*
* Software BP tests.
*
* NOTE: sw_bp need to be before the cmd here, because int3 is an
* exception rather than a normal trap for KVM_SET_GUEST_DEBUG (we
* capture it using the vcpu exception bitmap).
*/
asm volatile("sw_bp: int3");
/* Hardware instruction BP test */
asm volatile("hw_bp: nop");
/* Hardware data BP test */
asm volatile("mov $1234,%%rax;\n\t"
"mov %%rax,%0;\n\t write_data:"
: "=m" (guest_value) : : "rax");
/*
* Single step test, covers 2 basic instructions and 2 emulated
*
* Enable interrupts during the single stepping to see that pending
* interrupt we raised is not handled due to KVM_GUESTDBG_BLOCKIRQ.
*
* Write MSR_IA32_TSC_DEADLINE to verify that KVM's fastpath handler
* exits to userspace due to single-step being enabled.
*/
asm volatile("ss_start: "
"sti\n\t"
"xor %%eax,%%eax\n\t"
"cpuid\n\t"
"movl $" __stringify(MSR_IA32_TSC_DEADLINE) ", %%ecx\n\t"
"wrmsr\n\t"
"cli\n\t"
: : : "eax", "ebx", "ecx", "edx");
/* DR6.BD test */
asm volatile("bd_start: mov %%dr0, %%rax" : : : "rax");
/*
* Note, the IRET from the #DB that occurs in the below STI-shadow will
* unmask IRQs, i.e. the pending interrupt will be delivered after #DB
* handling, on the CLI!
*/
if (is_forced_emulation_enabled) {
asm volatile(KVM_FEP "fep_bd_start: mov %%dr0, %%rax" : : : "rax");
/* pending debug exceptions for emulation */
asm volatile("pushf\n\t"
"orq $" __stringify(X86_EFLAGS_TF) ", (%rsp)\n\t"
"popf\n\t"
"sti\n\t"
"fep_sti_start:"
"cli\n\t"
"pushf\n\t"
"orq $" __stringify(X86_EFLAGS_TF) ", (%rsp)\n\t"
"popf\n\t"
KVM_FEP "sti\n\t"
"fep_sti_end:"
"cli\n\t");
GUEST_ASSERT(irqs_received == 1);
}
GUEST_DONE();
}
static void vcpu_skip_insn(struct kvm_vcpu *vcpu, int insn_len)
{
struct kvm_regs regs;
vcpu_regs_get(vcpu, ®s);
regs.rip += insn_len;
vcpu_regs_set(vcpu, ®s);
}
int main(void)
{
struct kvm_guest_debug debug;
unsigned long long target_dr6, target_rip;
struct kvm_vcpu *vcpu;
struct kvm_run *run;
struct kvm_vm *vm;
struct ucall uc;
u64 cmd;
int i;
/* Instruction lengths starting at ss_start */
int ss_size[6] = {
1, /* sti*/
2, /* xor */
2, /* cpuid */
5, /* mov */
2, /* rdmsr */
1, /* cli */
};
TEST_REQUIRE(kvm_has_cap(KVM_CAP_SET_GUEST_DEBUG));
vm = vm_create_with_one_vcpu(&vcpu, guest_code);
run = vcpu->run;
/* Test software BPs - int3 */
memset(&debug, 0, sizeof(debug));
debug.control = KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP;
vcpu_guest_debug_set(vcpu, &debug);
vcpu_run(vcpu);
TEST_ASSERT(run->exit_reason == KVM_EXIT_DEBUG &&
run->debug.arch.exception == BP_VECTOR &&
run->debug.arch.pc == CAST_TO_RIP(sw_bp),
"INT3: exit %d exception %d rip 0x%llx (should be 0x%llx)",
run->exit_reason, run->debug.arch.exception,
run->debug.arch.pc, CAST_TO_RIP(sw_bp));
vcpu_skip_insn(vcpu, 1);
/* Test instruction HW BP over DR[0-3] */
for (i = 0; i < 4; i++) {
memset(&debug, 0, sizeof(debug));
debug.control = KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP;
debug.arch.debugreg[i] = CAST_TO_RIP(hw_bp);
debug.arch.debugreg[7] = 0x400 | (1UL << (2*i+1));
vcpu_guest_debug_set(vcpu, &debug);
vcpu_run(vcpu);
target_dr6 = 0xffff0ff0 | (1UL << i);
TEST_ASSERT(run->exit_reason == KVM_EXIT_DEBUG &&
run->debug.arch.exception == DB_VECTOR &&
run->debug.arch.pc == CAST_TO_RIP(hw_bp) &&
run->debug.arch.dr6 == target_dr6,
"INS_HW_BP (DR%d): exit %d exception %d rip 0x%llx "
"(should be 0x%llx) dr6 0x%llx (should be 0x%llx)",
i, run->exit_reason, run->debug.arch.exception,
run->debug.arch.pc, CAST_TO_RIP(hw_bp),
run->debug.arch.dr6, target_dr6);
}
/* Skip "nop" */
vcpu_skip_insn(vcpu, 1);
/* Test data access HW BP over DR[0-3] */
for (i = 0; i < 4; i++) {
memset(&debug, 0, sizeof(debug));
debug.control = KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP;
debug.arch.debugreg[i] = CAST_TO_RIP(guest_value);
debug.arch.debugreg[7] = 0x00000400 | (1UL << (2*i+1)) |
(0x000d0000UL << (4*i));
vcpu_guest_debug_set(vcpu, &debug);
vcpu_run(vcpu);
target_dr6 = 0xffff0ff0 | (1UL << i);
TEST_ASSERT(run->exit_reason == KVM_EXIT_DEBUG &&
run->debug.arch.exception == DB_VECTOR &&
run->debug.arch.pc == CAST_TO_RIP(write_data) &&
run->debug.arch.dr6 == target_dr6,
"DATA_HW_BP (DR%d): exit %d exception %d rip 0x%llx "
"(should be 0x%llx) dr6 0x%llx (should be 0x%llx)",
i, run->exit_reason, run->debug.arch.exception,
run->debug.arch.pc, CAST_TO_RIP(write_data),
run->debug.arch.dr6, target_dr6);
/* Rollback the 4-bytes "mov" */
vcpu_skip_insn(vcpu, -7);
}
/* Skip the 4-bytes "mov" */
vcpu_skip_insn(vcpu, 7);
/* Test single step */
target_rip = CAST_TO_RIP(ss_start);
target_dr6 = 0xffff4ff0ULL;
for (i = 0; i < ARRAY_SIZE(ss_size); i++) {
target_rip += ss_size[i];
memset(&debug, 0, sizeof(debug));
debug.control = KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_SINGLESTEP |
KVM_GUESTDBG_BLOCKIRQ;
debug.arch.debugreg[7] = 0x00000400;
vcpu_guest_debug_set(vcpu, &debug);
vcpu_run(vcpu);
TEST_ASSERT(run->exit_reason == KVM_EXIT_DEBUG &&
run->debug.arch.exception == DB_VECTOR &&
run->debug.arch.pc == target_rip &&
run->debug.arch.dr6 == target_dr6,
"SINGLE_STEP[%d]: exit %d exception %d rip 0x%llx "
"(should be 0x%llx) dr6 0x%llx (should be 0x%llx)",
i, run->exit_reason, run->debug.arch.exception,
run->debug.arch.pc, target_rip, run->debug.arch.dr6,
target_dr6);
}
/* test global disable */
memset(&debug, 0, sizeof(debug));
debug.control = KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP;
debug.arch.debugreg[7] = 0x400 | DR7_GD;
vcpu_guest_debug_set(vcpu, &debug);
vcpu_run(vcpu);
target_dr6 = 0xffff0ff0 | DR6_BD;
TEST_ASSERT(run->exit_reason == KVM_EXIT_DEBUG &&
run->debug.arch.exception == DB_VECTOR &&
run->debug.arch.pc == CAST_TO_RIP(bd_start) &&
run->debug.arch.dr6 == target_dr6,
"DR7.GD: exit %d exception %d rip 0x%llx "
"(should be 0x%llx) dr6 0x%llx (should be 0x%llx)",
run->exit_reason, run->debug.arch.exception,
run->debug.arch.pc, target_rip, run->debug.arch.dr6,
target_dr6);
/* test global disable in emulation */
if (is_forced_emulation_enabled) {
/* Skip the 3-bytes "mov dr0" */
vcpu_skip_insn(vcpu, 3);
vcpu_run(vcpu);
TEST_ASSERT(run->exit_reason == KVM_EXIT_DEBUG &&
run->debug.arch.exception == DB_VECTOR &&
run->debug.arch.pc == CAST_TO_RIP(fep_bd_start) &&
run->debug.arch.dr6 == target_dr6,
"DR7.GD: exit %d exception %d rip 0x%llx "
"(should be 0x%llx) dr6 0x%llx (should be 0x%llx)",
run->exit_reason, run->debug.arch.exception,
run->debug.arch.pc, CAST_TO_RIP(fep_bd_start),
run->debug.arch.dr6, target_dr6);
}
/* Disable all debug controls, run to the end */
memset(&debug, 0, sizeof(debug));
vcpu_guest_debug_set(vcpu, &debug);
vm_install_exception_handler(vm, DB_VECTOR, guest_db_handler);
vm_install_exception_handler(vm, IRQ_VECTOR, guest_irq_handler);
vcpu_run(vcpu);
TEST_ASSERT_KVM_EXIT_REASON(vcpu, KVM_EXIT_IO);
cmd = get_ucall(vcpu, &uc);
TEST_ASSERT(cmd == UCALL_DONE, "UCALL_DONE");
kvm_vm_free(vm);
return 0;
}
|
