From ac0ffe7cf1221182f4068d8aaf825b01655c7ca9 Mon Sep 17 00:00:00 2001 From: Vladimir Oltean Date: Wed, 10 Jun 2026 18:19:39 +0300 Subject: phy: lynx-28g: move lane mode helpers to new core module Do some preparation work for the introduction of the lynx-10g driver, which will share a common backbone with the 28G Lynx SerDes. This is just trivial stuff which can be moved without any surgery, and is easy to follow but otherwise pollutes more serious changes. The lane modes themselves are exported to a public header, because on the 10G Lynx, the hardware requires implementing a procedure called "RCW override". This requires coordination with drivers/soc/fsl/guts.c to tell it that a SerDes lane needs to be switched to a different protocol (enum lynx_lane_mode). Signed-off-by: Vladimir Oltean Link: https://patch.msgid.link/20260610151952.2141019-4-vladimir.oltean@nxp.com Signed-off-by: Vinod Koul --- include/soc/fsl/phy-fsl-lynx.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) create mode 100644 include/soc/fsl/phy-fsl-lynx.h (limited to 'include') diff --git a/include/soc/fsl/phy-fsl-lynx.h b/include/soc/fsl/phy-fsl-lynx.h new file mode 100644 index 000000000000..92e8272d5ae1 --- /dev/null +++ b/include/soc/fsl/phy-fsl-lynx.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* Copyright 2023-2026 NXP */ + +#ifndef __PHY_FSL_LYNX_H_ +#define __PHY_FSL_LYNX_H_ + +enum lynx_lane_mode { + LANE_MODE_UNKNOWN, + LANE_MODE_1000BASEX_SGMII, + LANE_MODE_10GBASER, + LANE_MODE_USXGMII, + LANE_MODE_25GBASER, + LANE_MODE_MAX, +}; + +#endif /* __PHY_FSL_LYNX_H_ */ -- cgit