summaryrefslogtreecommitdiff
path: root/drivers
AgeCommit message (Collapse)AuthorFilesLines
2026-07-28drm/amd/display: Add color transfer-function testsAlex Hung3-13/+184
[WHY] The color transfer-function calculation helpers were not covered by the amdgpu_dm_color KUnit suite. They rely on DAL fixed-point math and run under the KUnit UML build without native floating point. [HOW] Expose the five static helpers to KUnit and add direct coverage for the legacy, 16-bit, and 32-bit input and output transfer-function paths, including sRGB, linear, and ROM-backed variants. Assisted-by: Copilot:GPT-5.6-Sol Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/display: Add KUnit test for native backlight registrationAlex Hung1-0/+52
[WHAT] Add a KUnit case covering the successful path of amdgpu_dm_register_backlight_device(). The test uses the standard DRM KUnit device helpers to register a native backlight device, verifies the calculated backlight properties and cached brightness, and unregisters the device through KUnit cleanup to avoid leaking a class device across cases. Assisted-by: Copilot:GPT-5.6-Terra Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/display: Correct vblank_end calc for fams cmd packetNicholas Carbones1-1/+1
[Why] By changing how we populate vblank_nom, constraining vblank size, the vblank_end calculation for the fams command packet gets affected. We add up v_active with a new vblank_nom value for stream pstate's nom_vtotal, which describes the vtotal and nominal refresh rate, and that causes underflow. [How] Set nom_vtotal equal to the timing's v_total. Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Nicholas Carbones <Nicholas.Carbones@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/display: Use current mpc pipe in set output transfer funcTomasz Siemek1-2/+2
[why] Only the top pipe had the output transfer function programmed. [how] Program the current pipe from the MPC chain during fast sequence build. Reviewed-by: Martin Leung <martin.leung@amd.com> Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Tomasz Siemek <tomasz.siemek@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/display: add KUnit tests for audio commit pathAlex Hung2-0/+533
[WHAT] Add KUnit coverage for amdgpu_dm_commit_audio(), the remaining function reported as untested by gcov. The tests build hand-rolled drm_atomic_state arrays and back dc_stream_get_status() with a fake dc->current_state to cover the removal and addition ELD notifications along with their guard/skip paths: writeback connector, detached connector, missing new CRTC state, no modeset, and absent stream status. Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/display: add KUnit tests for audio component get_eldAlex Hung1-0/+119
[WHAT] Add KUnit coverage for amdgpu_dm_audio_component_get_eld(), one of the functions reported as untested by gcov. The tests use the standard DRM KUnit device plus drm_connector_init() to build a real connector list, then invoke the bound audio component get_eld callback. They cover the matching-connector ELD copy path, the writeback-connector skip, and the no-match (disabled) path. A shared connector funcs table and cleanup action back the fixtures. Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/display: add cursor moduleAlex Hung8-663/+796
[WHAT] Group the cursor policy and validation helpers from amdgpu_dm.c into a dedicated amdgpu_dm_cursor.c and amdgpu_dm_cursor.h. The moved functions are: dm_check_cursor_fb, dm_check_native_cursor_state, dm_should_update_native_cursor, dm_get_oriented_plane_size, dm_get_plane_scale, dm_plane_color_pipeline_active, dm_crtc_get_cursor_mode. The cursor helpers exposed by amdgpu_dm_cursor.h are called from amdgpu_dm.c, so give the three that lacked a namespace prefix the standard amdgpu_dm_ prefix: amdgpu_dm_check_native_cursor_state, amdgpu_dm_should_update_native_cursor and amdgpu_dm_crtc_get_cursor_mode. The descending-zpos plane iterator shared by these functions and amdgpu_dm_atomic_check (the for_each_oldnew_plane_in_descending_zpos macro and its __get_next_zpos helper) moves to amdgpu_dm.h, with the helper renamed amdgpu_dm_get_next_zpos and made non-static. Relocate the corresponding KUnit tests into amdgpu_dm_cursor_test.c. No functional change. Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/display: add FreeSync/VRR moduleAlex Hung8-764/+894
[WHAT] Group the FreeSync/VRR helpers from amdgpu_dm.c into a dedicated amdgpu_dm_freesync.c and amdgpu_dm_freesync.h. The moved functions are: is_dc_timing_adjust_needed, is_timing_unchanged_for_freesync, set_freesync_fixed_config, reset_freesync_config_for_crtc, get_freesync_config_for_crtc, update_freesync_state_on_stream, update_stream_irq_parameters, amdgpu_dm_handle_vrr_transition. The FreeSync/VRR helpers exposed by amdgpu_dm_freesync.h are called from amdgpu_dm.c, so give the seven that lacked a namespace prefix the standard amdgpu_dm_ prefix: Relocate the corresponding KUnit tests into amdgpu_dm_freesync_test.c. No functional change. Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/display: move GPU mem helpers to servicesAlex Hung2-53/+53
[WHAT] dm_allocate_gpu_mem() and dm_free_gpu_mem() are generic DM service helpers that wrap amdgpu_bo_create_kernel()/amdgpu_bo_free_kernel() and track allocations on adev->dm.da_list. Move them out of amdgpu_dm.c into amdgpu_dm_services.c alongside the other dm_* service callbacks. Both are already public and declared in amdgpu_dm.h; their callers in amdgpu_dm_dmub.c and amdgpu_dm_helpers.c are unaffected. No functional change. Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/display: move watermarks table to pp_smuAlex Hung6-69/+76
[WHAT] amdgpu_dm_smu_write_watermarks_table() pushes fixed dcn watermark clock settings to the SMU on Navi1x. It belongs with the other dc-pplib bridge code, so move it out of amdgpu_dm.c into amdgpu_dm_pp_smu.c. It is called from dm_resume(), so it becomes a plain exported function declared in amdgpu_dm_pp_smu.h (now included by amdgpu_dm.c) instead of STATIC_IFN_KUNIT in amdgpu_dm.h. Relocate its KUnit test from the amdgpu_dm suite to the amdgpu_dm_pp_smu suite. No functional change. Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/display: move stutter quirk to quirks fileAlex Hung5-99/+99
[WHAT] dm_should_disable_stutter() and its amdgpu_stutter_quirk PCI match table are self-contained quirk logic. Move them out of amdgpu_dm.c into amdgpu_dm_quirks.c alongside the existing DMI quirk handling. The helper is called from amdgpu_dm_init(), so it becomes a plain exported function instead of STATIC_IFN_KUNIT, and its declaration moves from the KUnit-only block to a regular prototype in amdgpu_dm.h. Relocate its KUnit tests from the amdgpu_dm suite to the amdgpu_dm_quirks suite. No functional change. Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/display: move scaling helper to connectorAlex Hung4-265/+266
[WHAT] amdgpu_dm_update_stream_scaling_settings() computes the stream src/dst rectangles for a connector's scaling mode. It is already declared in amdgpu_dm_connector.h and consumed by create_stream_for_sink(), so move its definition out of the oversized amdgpu_dm.c into amdgpu_dm_connector.c where it belongs. Relocate its KUnit tests from the amdgpu_dm suite to the amdgpu_dm_connector suite accordingly. No functional change. Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/display: Add AV mute wait frames to dce110_set_avmuteRay Wu1-1/+20
Port the three-frame wait logic from dcn30_set_avmute to dce110_set_avmute so that older DCN versions (1.0, 2.0) also wait for GCP packets to be sent out before proceeding. This ensures HDMI sinks properly process the mute state, preventing garbled display after link re-establishment. Closes: https://gitlab.freedesktop.org/drm/amd/-/work_items/5167 Reviewed-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Ray Wu <ray.wu@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/display: Add KUnit tests for hdcp_destroyBhawanpreet Lakha2-0/+123
Verify hdcp_destroy() cancels each link's delayed works, removes the SRM sysfs file and frees the workqueue and SRM buffers. Cover both a populated work-queue and the zero-link / NULL-SRM path. Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/display: Add KUnit tests for watchdog and cpirq eventsBhawanpreet Lakha3-2/+140
Verify event_watchdog_timer() cancels its pending watchdog_dwork and runs process_output(), and that event_cpirq() runs process_output() without arming the callback or watchdog timers. Both release the work-queue mutex on return. Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/display: Add KUnit tests for event_property_validateBhawanpreet Lakha3-1/+182
Cover the per-connector scan in event_property_validate(): NULL, disconnected and NULL-state connectors are skipped; a changed encryption status updates the cached value and schedules property_update_work; and an unchanged status leaves it untouched. Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/display: Add KUnit tests for event_callbackBhawanpreet Lakha3-1/+82
Verify event_callback() cancels a pending callback_dwork and then runs process_output(), which re-arms property_validate_dwork, and that the work-queue mutex is released on return. Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/display: Add KUnit tests for HDCP display helpersBhawanpreet Lakha3-1/+214
Cover the HDCP display lifecycle helpers: - hdcp_update_display() registers the connector and, on the disable path, resets the per-link encryption status to HDCP_OFF. - hdcp_remove_display() reverts an ENABLED connector back to DESIRED and clears the per-link entry, including the NULL connector-state path. - hdcp_reset_display() clears the encryption status and the connector for every link. Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/display: Add KUnit tests for link_lock and psp SRM helpersBhawanpreet Lakha3-3/+140
Cover link_lock() across all links (lock then unlock) and the max_link == 0 no-op path, checking each per-link mutex ends in the expected state. Also cover the psp_get_srm() and psp_set_srm() guard paths when the HDCP TA context is uninitialized: psp_get_srm() returns NULL and psp_set_srm() returns -EINVAL, both leaving their output parameters untouched. The post-guard paths invoke real PSP firmware and are not unit-testable in UML. Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/display: Fix force FRL rate debug settingRelja Vojvodic2-2/+4
[Why & How] - force FRL rate debug bit was not correctly forcing requested FRL rate Reviewed-by: Chris Park <chris.park@amd.com> Signed-off-by: Relja Vojvodic <Relja.Vojvodic@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/display: Port DCN4+ MCIF ARB programming to new formatDillon Varone9-29/+227
[WHY&HOW] DML2.1 now outputs MCIF arbiter programming, but using a new structure. Change DCN401 and DCN42 to use this new format. Reviewed-by: Sridevi Arvindekar <sridevi.arvindekar@amd.com> Signed-off-by: Dillon Varone <Dillon.Varone@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/display: Fix use-after-free bugs in KUnit testsJohn Harrison3-21/+24
When running the KUnit tests with memory debugging enabled, a bunch of use-after-free errors are hit. These are due to using KUnit managed memory for the test objects but then giving them over to DRM managed objects. The KUnit stuff is deallocated first and when the DRM side calls its clean up helpers, it hits memory that has been freed already. NB: There is still a use-after-free bug in the writeback tests. However, fixing that requires driver side changes as well as test side changes. Those changes are part of: https://patchwork.freedesktop.org/series/152420/ Signed-off-by: John Harrison <John.Harrison@Igalia.com> CC: Alex Hung <alex.hung@amd.com> CC: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/display: share common DM KUnit helpersAlex Hung6-77/+52
Move fixture setup that was duplicated across several amdgpu_dm KUnit tests into amdgpu_dm_kunit_helpers.c: - dm_kunit_alloc_dc_with_ctx() allocates a dc and its dc_context. - dm_kunit_alloc_drm_with_connector_list() allocates a drm_device with an initialized connector list. Update the irq, psr, crtc and backlight tests to use these helpers. Reviewed-by: Bhawanpreet Lakha <bhawanpreet.lakha@amd.com> Signed-off-by: Alex Hung <alex.hung@amd.com> Signed-off-by: Fangzhi Zuo <jerry.zuo@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amdkfd: Avoid topology_lock in kfd_mmapPhilip Yang1-3/+5
Use process-local GPU lookup in kfd_mmap() instead of kfd_device_by_id(), so mmap path does not take topology_lock while holding mmap_lock. Lockdep warning: possible circular locking dependency detected. Chain: &topology_lock -> &root->kernfs_rwsem -> &mm->mmap_lock Backtrace #0 (&topology_lock): down_read+0x8b/0x490 kfd_device_by_id+0x1d/0xf0 [amdgpu] kfd_mmap+0x11e/0x750 [amdgpu] __mmap_region+0x101f/0x25e0 mmap_region+0x228/0x2e0 do_mmap+0x9f2/0x1070 vm_mmap_pgoff+0x25d/0x430 Backtrace #1 (&root->kernfs_rwsem): down_write+0x80/0x200 kernfs_add_one+0x30/0x6a0 kernfs_create_dir_ns+0xd2/0x160 sysfs_create_dir_ns+0x12c/0x2a0 kobject_add_internal+0x280/0x8e0 kfd_topology_update_sysfs+0xb85/0x1970 [amdgpu] Backtrace #2 (&mm->mmap_lock): down_read_killable+0x8e/0x510 lock_mm_and_find_vma+0x299/0xb00 do_user_addr_fault+0x3fc/0xf80 exc_page_fault+0x73/0x110 filldir64+0x1aa/0x610 kernfs_fop_readdir+0x3c2/0x810 Signed-off-by: Philip Yang <Philip.Yang@amd.com> Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/display: Fix flip-done timeouts on mode1 resetLeo Li1-2/+11
The vblank on/off callbacks mixed use of amdgpu_irq_get/put() and amdgpu_dm_crtc_set_vupdate_irq() to enable and disable IRQs. With get/put, base driver will callback into DC to disable IRQs when refcount == 0. With set_vupdate_irq(), DC is called directly to disable IRQs, bypassing base driver's refcount tracking. During gpu reset, base driver can restore IRQs via amdgpu_irq_gpu_reset_resume_helper() > amdgpu_irq_update(). So if get/put() is not used (i.e. refcount == 0), then vupdate_irq will be disabled. This is problematic if DRM requests vblank on before amdgpu_irq_update() is called: drm_vblank_on() > set_vupdate_irq() enables vupdate_irq, but the refcount is still 0. gpu_reset_resume_helper() > irq_update() then immediately disables it, thus leading to flip done timeouts. This is made worse on DCN since VUPDATE_NO_LOCK is the only IRQ enabled. Prior to the "Fixes:" change, a combination of GRPH_FLIP and VSTARTUP IRQs were used, and they used get/put(). This explains why the change exposed this issue. Fix by using get/put() instead of set_vupdate_irq(). DCE is unchanged, since it relies on unbalanced enable/disable calls based on VRR status, and hence requires direct set_vupdate_irq(). Plus, it also uses GRPH_FLIP and VLINE IRQs, which are properly tracked by get/put(). Fixes: c87e6635d2db ("drm/amd/display: consolidate DCN vblank/flip handling onto vupdate_no_lock") Reviewed-by: Mario Limonciello (AMD) <superm1@kernel.org> Signed-off-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/pm: fix torn gpu metrics readsYang Wang3-11/+12
amdgpu_dpm_get_gpu_metrics() returns a pointer to the shared metrics cache after dropping adev->pm.mutex. The sysfs path then copies from that pointer. Another reader can refresh the cache in place during the copy and return a snapshot containing data from two generations. Pass caller-provided storage through the DPM interface and copy the metrics while the mutex is held. This keeps the cache pointer private and makes each sysfs read observe one complete sample. Fixes: 25c933b1c4fc ("drm/amd/powerplay: add new sysfs interface for retrieving gpu metrics(V2)") Signed-off-by: Yang Wang <kevinyang.wang@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/pm: fix pptable use-after-freeYang Wang3-14/+16
amdgpu_dpm_get_pp_table() returns a pointer to a driver-owned power table after dropping adev->pm.mutex. The sysfs path then copies from that pointer. A concurrent pp_table write can replace and free the allocation during the copy, causing a use-after-free. Change the DPM interface to copy into caller-provided storage while the mutex is held. Keep the size-only query for attribute discovery without exposing the driver-owned pointer. Fixes: 1684d3ba4885 ("drm/amd/amdgpu: change pptable output format from ASCII to binary") Signed-off-by: Yang Wang <kevinyang.wang@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/ras: detect old ras eeprom formatTao Zhou4-10/+44
Handler of some formats will be implemented in the future. UMC_CHANNEL_IDX_V2 is a flag to indicate v2 format channel index stored in eeprom, the flag was retired in v3 and save_nps is introduced in v3, so they have no conflict. eeprom format v1: store channel index within a umc instance in eeprom range in UMC v12: 0 ~ 7 eeprom format v2: store global channel index in eeprom range in UMC v12: 0 ~ 127 v2: change the bit range of save_nps from [40:47] to [40:46], UMC_CHANNEL_IDX_V2 use bit 47. use RAS_DEV_WARN_RATELIMITED for retire record check, avoid log noise. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amdgpu: convert ptl_hw_supported to enumVictor Zhao4-12/+33
Convert ptl_hw_supported to enum with three states: - AMDGPU_PTL_HW_UNINIT: not yet initialized - AMDGPU_PTL_HW_SUPPORTED: initialized and supported - AMDGPU_PTL_HW_NOT_SUPPORTED: initialized and not supported This allows skipping PTL initialization attempts when hardware is known to not support it, avoiding repeated initialization failures after GPU resets. v2:move ptl_hw_supported_state to AMDGPU_PTL_HW_NOT_SUPPORTED regardless of error code during first time initialization. Print init fail log when error code is not EOPNOTSUPP. Signed-off-by: Victor Zhao <Victor.Zhao@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amdgpu: always get PTL state from PSP under sriovVictor Zhao1-3/+27
In SR-IOV mode, always query the latest PTL status from host via psp_performance_monitor_hw() to ensure the sysfs shows real-time hardware state. Signed-off-by: Victor Zhao <Victor.Zhao@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amdgpu: add generic interfaces for PTL requests in virtualizationVictor Zhao6-3/+121
Add Performance Throttle Limiter (PTL) support for SR-IOV guest. Since VF cannot communicate with PSP directly at runtime in SR-IOV environment, use mailbox data fields to pass PTL parameters to PF, and parse response status from host mailbox registers. v2: - remove redundent checks - remove unused marco Signed-off-by: Victor Zhao <Victor.Zhao@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/ras: update flip bit setting for unirasTao Zhou5-25/+76
The flip bit setting is different if umc number is 8, only NPS1 and NPS2 are supported in this mode. Note: the typical value of umc number is 16, and it can only be 8 or 16 on umc v12. v2: if other umc number is encountered, default setting will be used. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amdgpu: enable mode2 reset for SMU IP v15.0.5Kanala Ramalingeswara Reddy1-0/+1
Set the default reset method to mode2 for SMU 15.0.5. Signed-off-by: Kanala Ramalingeswara Reddy <Kanala.RamalingeswaraReddy@amd.com> Reviewed-by: Pratik Vishwakarma <Pratik.Vishwakarma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amdkfd: fix uint32_t overflow in EOP ring buffer size alignmentWilliam Palacek1-1/+1
eop_ring_buffer_size in struct queue_properties is a u32. In kfd_queue_acquire_buffers() the expected EOP buffer size is computed as ALIGN(eop_ring_buffer_size, PAGE_SIZE); ALIGN uses typeof(x), so the addition is done in 32-bit. A user-supplied size of 0xFFFFF001 wraps to 0, causing kfd_queue_buffer_get() to skip its exact-size check (gated on size != 0) and accept any BO mapped at the address. On GFX8/GFX9 the MQD cp_hqd_eop_control is then programmed for an 8KB EOP ring backed by a 4KB BO, so CP EOP writes can land past the buffer and fault the GPU. Cast the operand to u64 so the alignment is computed in 64-bit; the size check in kfd_queue_buffer_get() then rejects the oversized request. Fixes: 42ea9cf2f16b ("drm/amdkfd: Relax size checking during queue buffer get") Signed-off-by: William Palacek <William.Palacek@amd.com> Reviewed-by: Alysa Liu <Alysa.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amdgpu: Fix NBIO 7.11.5 offsetsShubhankar Milind Sardeshpande1-63/+69
Fix NBIO 7.11.5 related offsets Signed-off-by: Shubhankar Milind Sardeshpande <Shubhankar.MilindSardeshpande@amd.com> Reviewed-by: Mario Limonciello (AMD) <superm1@kernel.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amdgpu: Enable support for PSP 15_0_5Shubhankar Milind Sardeshpande3-16/+83
Add PSP 15.0.5 related offsets for GFX to KMD interface and enable support for it. Co-developed-by: Pratik Vishwakarma <Pratik.Vishwakarma@amd.com> Signed-off-by: Pratik Vishwakarma <Pratik.Vishwakarma@amd.com> Signed-off-by: Shubhankar Milind Sardeshpande <Shubhankar.MilindSardeshpande@amd.com> Reviewed-by: Mario Limonciello (AMD) <superm1@kernel.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amdkfd: Fix missing authorization check in KFD_IOC_DBG_TRAP_DISABLEGang Ba1-3/+7
Prevent unauthorized termination of active GPU debug sessions. Previously, users with /dev/kfd access could terminate another process's debug session without proper ownership or ptrace authorization. Signed-off-by: Gang Ba <Gang.Ba@amd.com> Reviewed-by: Kent Russell <kent.russell@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amdgpu: move debug_vm handling to amdgpu_cs_parser_finiPierre-Eric Pelloux-Prayer1-14/+16
The commit referenced below restarts the CS if the validation is still in progress. When debug_vm is enabled, all BOs from the CS are invalidated so we will hit an infinite loop. To avoid that, defer BO invalidation to amdgpu_cs_parser_fini. Fixes: 59720bfd8c6d ("drm/amdgpu: restart the CS if some parts of the VM are still invalidated") Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amdgpu: Update driver if header for SMU V15.0.5Kanala Ramalingeswara Reddy3-7/+253
Update smu v15.0.0 driver if header to be v15.0.5 compatible. Signed-off-by: Kanala Ramalingeswara Reddy <Kanala.RamalingeswaraReddy@amd.com> Reviewed-by: Mario Limonciello (AMD) <superm1@kernel.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amdkfd: Handle invalid event type in CRIU event restoreDavid Francis1-0/+3
In kfd_criu_restore_event, there was no handling for the event priv data having an invalid event type. The priv data here is untrusted and can be invalid. In that case, fail with EINVAL. Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: Kent Russell <kent.russell@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/ras: send RMA event in RAS init stageTao Zhou1-0/+5
Previously the event was only raised at runtime, also raise it during RAS init when threshold is exceeded and eeprom header is tagged bad, so we can get related cper at boot time. Signed-off-by: Tao Zhou <tao.zhou1@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amdgpu: Update message IDs to PMFW to correctly gather GFXOFF residency logsFares Soliman5-16/+50
Updates PPSMC_MSGs and set/get functions for gathering GFXOFF logs on Van Gogh. Logs are now gathered live rather than starting then stopping logging and reading an average value afterwards. This is in accordance to changes made in PMFW. In regards to messageID 0x52, the old interface uses a start/stop parameter, and the new one doesn't. The firmware is checked to determine which method to use. v2: added firmware guard to new interface, old interface kept as fallback Signed-off-by: Fares Soliman <Fares.Soliman@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amdgpu: Add missing MES helper parameter descriptionsSrinivasan Shanmugam1-14/+29
Complete the kernel-doc comments for the MES RS64 memory, process context, and gang context helper functions by documenting the missing function parameters to keep the kernel-doc comments consistent with their function signatures. Fixes: 56f7ea845e7d ("drm/amdgpu: add RS64 local memory context array init/fini") Fixes: cf5f98609a03 ("drm/amdgpu: add mes process context alloc/free") Fixes: 5ab89b491f21 ("drm/amdgpu: add mes gang contex alloc/free helper") Cc: Prike Liang <Prike.Liang@amd.com> Cc: Michael Chen <michael.chen@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Michael Chen <michael.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/display: Fix writeback completion timingAlex Hung3-15/+21
[WHY] The out fence was signalled on the first vblank after arming, before the DMA finished copying, and the old code worked around this with an mdelay() in the IRQ handler. [HOW] Hold a vblank reference while writeback is pending and signal the out fence on the second vblank instead of using mdelay(). Add amdgpu_dm_crtc_complete_writeback() to finish and clean up writeback from both the IRQ and teardown paths. This can be verified by running IGT's kms_writeback 20 times without timeout errors. Assisted-by: Copilot:Claude-Opus-4.8 Signed-off-by: Alex Hung <alex.hung@amd.com> Reviewed-by: Mario Limonciello (AMD) <superm1@kernel.org> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amdgpu: Pack nested ucode_info structAlex Hung1-1/+1
Building for ARCH=um with W=1 C=1 makes the "amd_sriov_msg_vf2pf_info must be 1 KB" static assertion in amdgv_sriovmsg.h fail under sparse, exposed after UML builds were enabled. Sparse does not honor #pragma pack(push, 1) for the nested ucode_info struct, so it sizes each element as 8 bytes instead of 5 and computes the surrounding structure as larger than 1 KB. The compilers get this right via the enclosing pragma, but the annotation should be explicit. Fixes: af3f2f5db265 ("drm/amdgpu: Remove UML build exclusion from Kconfig") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202607091659.SHEscT0c-lkp@intel.com/ Cc: Harry Wentland <harry.wentland@amd.com> Assisted-by: Copilot:Claude-Opus-4.8 Signed-off-by: Alex Hung <alex.hung@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amdgpu: Fix __rcu fence pointer accessesAlex Hung2-2/+2
Building for ARCH=um with W=1 C=1 makes sparse report "incompatible types in comparison expression (different address spaces)" warnings in the KFD code, exposed after UML builds were enabled: - amdgpu_amdkfd_fence.c compares the __rcu-annotated dma_fence.ops pointer directly in to_amdgpu_amdkfd_fence(). - amdgpu_amdkfd_gpuvm.c compares the __rcu eviction fence pointer directly in amdgpu_amdkfd_gpuvm_restore_process_bos(). Fixes: af3f2f5db265 ("drm/amdgpu: Remove UML build exclusion from Kconfig") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202607091659.SHEscT0c-lkp@intel.com/ Cc: Harry Wentland <harry.wentland@amd.com> Assisted-by: Copilot:Claude-Opus-4.8 Signed-off-by: Alex Hung <alex.hung@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amdkfd: fix QID bit leak in pqm_create_queue()Vladimir Marioukhine1-1/+1
When MES is enabled and amdgpu_amdkfd_alloc_kernel_mem() fails during the first queue creation for a process, pqm_create_queue() returns early via 'return retval' without going through the err_create_queue cleanup label. This means clear_bit(*qid, pqm->queue_slot_bitmap) is never called, leaving the reserved QID bit permanently set in queue_slot_bitmap. Over time this leaks QID slots, potentially exhausting all available queue slots. Fix this by replacing 'return retval' with 'goto err_allocate_pqn' so that clear_bit() is always called on the error path without touching the uninitialized pqn pointer. AILIKFD-813 Reported-by: Deucher, Alexander <alexander.deucher@amd.com> Signed-off-by: Vladimir Marioukhine <Vladimir.Marioukhine@amd.com> Reviewed-by: Kent Russell <kent.russell@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amdgpu: Drop vm_manager PASID to VM mappingSrinivasan Shanmugam3-32/+3
VM lookup users now resolve DRM PASIDs through the global PASID xarray: PASID -> fpriv -> VM The per-device vm_manager.pasids xarray is no longer needed. Remove PASID registration and removal from the VM init/fini paths, drop vm_manager PASID initialization/cleanup, and remove the xarray from struct amdgpu_vm_manager. The PASID is allocated only after amdgpu_vm_init() completes, so the initializer no longer consumes or assigns a PASID. Remove the now-unused argument while keeping vm->pasid as per-VM state for TLB flushes and other hardware programming paths. v6: - Remove the now-unused PASID argument from amdgpu_vm_init(). - Remove the related vm->pasid assignment and error-path reset from VM init. - Keep vm->pasid in struct amdgpu_vm for existing hardware users. Cc: Alex Deucher <alexander.deucher@amd.com> Suggested-by: Christian König <christian.koenig@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/display: Promote DC to 3.2.390Taimur Hassan1-1/+1
This DC patchset brings improvements in multiple areas. In summary, we have: * Unified dc_update_state commit interface with dc_probe model, dc_state_get_status, and perfmon BLS sequence * DCN42 enhancements including mcache programming, PMFW DF C-state client, and DCCG clocking fix * DML2.1 writeback validation plus MCIF ARB and watermark/latency updates * Color management refactor to dc_plane_cm with plane/CRTC colorop test coverage * Greatly enhanced KUnit coverage across amdgpu_dm, connector, CRC, DMUB, and color management * HDMI AV mute timing, DP link training logging, and Apple Studio Display fixes * Code cleanup including DCE trim from DCN-only builds and HWSS refactors Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Taimur Hassan <Syed.Hassan@amd.com> Signed-off-by: Wayne Lin <wayne.lin@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-28drm/amd/display: Add SPL UPSP upsampling and YUV422 scaling supportWayne Lin2-26/+234
- Add YUV422/YUV444 pixel format definitions - Handle YUV422 chroma scaling ratios - Use separate horizontal and vertical viewport divisors - Add UPSP upsampling register programming - Refine tap selection for horizontally and vertically subsampled formats Reviewed-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Wayne Lin <Wayne.Lin@amd.com> Tested-by: Dan Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit (git 2.54.0.dirty) at 2026-09-29 22:13:36 +0000