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2026-08-01ASoC: dt-bindings: qcom,wsa8855: add Qualcomm WSA8855 speaker amplifierPrasad Kumpatla1-0/+93
Add bindings for the Qualcomm WSA8855 stereo smart speaker amplifier. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com> Link: https://patch.msgid.link/20260715115220.3093799-2-prasad.kumpatla@oss.qualcomm.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-07-31perf hisi-ptt: Fix PTT trace TLP header parsingSizhe Liu1-14/+14
TLP Headers traced by HiSilicon PCIe tune and trace device (PTT) in 4DW format are shown in the document as below: bits [31:30] [ 29:25 ][24][23][22][21][ 20:11 ][ 10:0 ] |-----|---------|---|---|---|---|-------------|-------------| DW0 [ Fmt ][ Type ][T9][T8][TH][SO][ Length ][ Time ] DW1 [ Header DW1 ] DW2 [ Header DW2 ] DW3 [ Header DW3 ] Problem: The DW0 bit field layout of the hisi_ptt_4dw union does not match the actual bit ordering in little-endian memory, causing incorrect field decoding. Test on Kunpeng 930 SOC, generating data flow with `iperf` commands: - server side: iperf -s - client side: iperf -c $ip_addr -t 30 Trace the TLP headers with hisi_ptt on server side at the same time: perf record -e hisi_ptt12_0/type=4,filter=0x05101,direction=2,format=0/ \ --max-size 50M -o perf.data & The trace aims to capture completion TLPs, learn more in the document: https://docs.kernel.org/trace/hisi-ptt.html Decode perf.data with hisi_ptt decoder: perf report -D The hisi_ptt decoder produces the following result: [...perf headers and other information] . ... HISI PTT data: size 8388608 bytes . 00000000: 68 87 20 94 Format 3 Type 1a T9 0 T8 1 TH 1 SO 1 Length 10 Time 4a1 . 00000004: 40 00 00 00 Header DW1 . 00000008: 40 00 01 51 Header DW2 . 0000000c: 00 00 00 00 Header DW3 [...other hisi_ptt TLP headers] According to PCIe r5.0 sec 2.2.1, the Fmt & Type of Cpl/CplD is supposed to be 8b'00001010' / 8b'01001010' However, the Format & Type decoder analyzing result is 8b'01111010'. It does not match field encodings of any TLP. Correct decoder result should be: [...perf headers and other information] . ... HISI PTT data: size 8388608 bytes . 00000000: 94 20 87 68 Format 2 Type a T9 0 T8 0 TH 0 SO 1 Length 10 Time 768 . 00000004: 00 00 00 40 Header DW1 . 00000008: 51 01 00 40 Header DW2 . 0000000c: 00 00 00 00 Header DW3 [...other hisi_ptt TLP headers] To solve the problem: 1. Drop the union and C bitfield struct, store the raw DW value in a plain uint32_t, and extract the fields with FIELD_GET() against GENMASK/BIT masks declared in the header so they can be reused by other translation units. The masks are portable across endianness and compilers. 2. Print all DW hex values in big-endian byte order for readability, matching the bit field layout shown in the 4DW format diagram. 3. Read the DW value with get_unaligned_le32() instead of an unaligned pointer cast, avoiding both strict-aliasing violations and alignment hazards on hosts that do not support unaligned access. Cc: stable@vger.kernel.org Fixes: 5e91e57e6809 ("perf auxtrace arm64: Add support for parsing HiSilicon PCIe Trace packet") Reviewed-by: James Clark <james.clark@linaro.org> Signed-off-by: Sizhe Liu <liusizhe5@huawei.com> Signed-off-by: Namhyung Kim <namhyung@kernel.org>
2026-07-31KVM: x86: Document APIC base address constraint for in-kernel irqchipTim Wiederhake1-0/+12
When virtual APIC access acceleration is enabled (APICv on Intel, AVIC on AMD), vcpu creation installs a private memory slot at the default APIC base address (0xfee00000). If a user memory region overlaps this address, vcpu creation fails with EEXIST. The same error occurs when installing an overlapping user memory region after vcpu creation. This also applies when using KVM_CAP_SPLIT_IRQCHIP. This constraint is not documented anywhere. Add a note to the KVM_CREATE_IRQCHIP and KVM_CAP_SPLIT_IRQCHIP documentation. Signed-off-by: Tim Wiederhake <twiederh@redhat.com> Link: https://patch.msgid.link/20260708133856.302151-3-twiederh@redhat.com [sean: call out "subsequent vcpu creation"] Signed-off-by: Sean Christopherson <seanjc@google.com>
2026-07-31KVM: x86: Document that KVM_CREATE_IRQCHIP must precede vCPU creationTim Wiederhake1-1/+2
The kernel rejects KVM_CREATE_IRQCHIP with -EINVAL if any vCPUs have already been created, but the API documentation does not mention this constraint. Add a note. Signed-off-by: Tim Wiederhake <twiederh@redhat.com> Link: https://patch.msgid.link/20260708133856.302151-2-twiederh@redhat.com Signed-off-by: Sean Christopherson <seanjc@google.com>
2026-08-01Merge tag 'drm-xe-next-2026-07-30' of ↵Dave Airlie2-0/+37
https://gitlab.freedesktop.org/drm/xe/kernel into drm-next - Wait on external BO kernel fences in exec IOCTL (Brost) - General clean-up (Anas) - Documentation fix (Rafael) - Add a debugfs for pcode information (Karthik) - Free madvise VMA array on L2 flush failure (Guangshuo) - Page Table related fixes (Shuicheng, Zongyao) - Improvements GuC error handling and GuC small fixes (Sk, Zhanjun, Arvind) - Add new W/As (Daniele, Harish) - GuC paging engine support (Auld) - Add and use more KLV helpers (Michal) - Balance exec queue suspend/resume (Niranjana, Thomas) - Fix BO prefetch with CONSULT_MEM_ADVISE_PREF_LOC (Himal) - SRIOV: Disable display in admin only PF mode (Satya) - Fix writable override for CRI NVM (Sasha) - Fix VF CCS attach/detach race with in-flight BO moves (Brost) - Introduce Xe Uncorrectable Error Handling (Riana) - Fix WOPCM size for LNL+ (Daniele) - Consolidate debugfs fault injection functions (Mallesh) - Multi-queue related fixes and improvements (Niranjana, Jagmeet, Shuicheng) - Add RAS GPU health indicator (Soham) - PAT related improvements (Roper, Sanjay) - NULL deref fix on migration on VF (Satya) - i2c related fix (Raag) - Fix SVM leak and clean up xe_vm_create (Shuicheng) - Drop force_probe requirement for NVL-s (Gustavo) - Optimise TT population for DONTNEED BOs (Auld) - Add page size allocation mode control and coverage (Himal, Nareshkumar) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patch.msgid.link/amt2kDVdyBK6VEyU@intel.com
2026-07-31spi: ma35d1-qspi: Add Nuvoton MA35D1 QSPI controllerMark Brown1-0/+63
Chi-Wen Weng <cwweng.linux@gmail.com> says: Add devicetree binding and SPI controller driver support for the Quad SPI controller found in Nuvoton MA35D1 SoCs. The controller provides two native chip selects and supports standard SPI and spi-mem operations using single, dual and quad bus widths. This initial implementation uses 8-bit PIO transfers and supports per-operation clock configuration, clock and reset handling, and direct execution of SPI memory operations. DMA and active-high chip select support are intentionally left out of the initial driver. Link: https://patch.msgid.link/20260731023818.1626075-1-cwweng.linux@gmail.com
2026-07-31dt-bindings: spi: nuvoton,ma35d1-qspi: Add Nuvoton MA35D1 QSPIChi-Wen Weng1-0/+63
Add a devicetree binding for the Quad SPI controller found in Nuvoton MA35D1 SoCs. The controller supports SPI memory devices such as SPI NOR and SPI NAND flashes. It has one register range, one clock input and one reset line, and supports up to two chip selects. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Chi-Wen Weng <cwweng@nuvoton.com> Link: https://patch.msgid.link/20260731023818.1626075-2-cwweng.linux@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-08-01Merge tag 'drm-intel-next-2026-07-28' of ↵Dave Airlie2-0/+12
https://gitlab.freedesktop.org/drm/i915/kernel into drm-next drm/i915 feature pull #2 for v7.3: Features and functionality: - Enable UHBR link rates on Thunderbolt tunneled links (Imre) - Reduce Xe3+ PM demand peak bandwidth for power savings (Vinod) - Add the blend mode property to all planes that support alpha blending (Chaitanya) - Enable pipe DMC error interrupts for display 30+ (Dibin) - Add KUnit tests for DP link config selection and fallback (Imre) Refactoring and cleanups: - Refactor DP link config selection and unify across use cases (Imre) - Unify i915 and xe display runtime PM calls (Jani) - Refactor BIOS framebuffer takeover (Ville) Fixes: - Fix HD audio on DP UHBR SST (Kai Vehmanen) - Fixes to xe driver BIOS framebuffer takeover (Ville) - Fix 2 pixels-per-clock CDCLK calculation to avoid underruns (Ville) - Fix incorrectly set VSC SDP Main Stream Attribute (Chaitanya) - Fix BPC and DSC selection for HDMI sinks (Alexander Kaplan) - Fix PCON max FRL rate selection (Alexander Kaplan) - Workaround Xe3P PSR2 screen corruption (Dibin) - Fix NVL A & B stepping vtotal setting (Suraj) - Fix xe DPT allocation paths (Maarten) - Prefer system memory instead of stolen for new framebuffers in xe (Maarten) - Fix transcoder mask sizes (John Harrison) - Clear stale UV/Y plane DDB entries on plane disable (Vinod) - Fix some DP AUX backlight control issues, again (Suraj) - Fix switching between HDCP 1.4 and 2.2 authentication (Suraj) - Remove unnecessary Xe2_LPD+ FBC plane width and surface size limits (Vinod) - Ensure non-zero DSB safe window for PTL+ (Ankit) - Fix bandwidth calculation to account for 16 DRAM channels (Uma) - Fix NV12 ceiling division for bigjoiner case (Vidya) DRM core changes: - Add Thunderbolt UHBR tunneling support (Imre) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Jani Nikula <jani.nikula@intel.com> Link: https://patch.msgid.link/cb1b5a644d75589cbcdcc8ec8160968140426439@intel.com
2026-07-31Merge tag 'amd-pstate-v7.3-2026-07-30' of ↵Rafael J. Wysocki1-21/+20
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/superm1/linux Pull amd-pstate 7.3 content (07/30/26) from Mario Limonciello: "* Changes for dynamic EPP * Adjustments to the bios min perf feature * Fixes to kernel doc" * tag 'amd-pstate-v7.3-2026-07-30' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/superm1/linux: cpufreq/amd-pstate: Document missing kernel-doc members cpufreq/amd-pstate-ut: Add unit test for CPPC Performance Priority cpufreq/amd-pstate-ut: Add unit test for "dynamic" EPP mode cpufreq/amd-pstate: Reduce the scope of exported symbols Documentation/amd-pstate: Update dynamic_epp documentation with new behavior cpufreq/amd-pstate: Remove "amd_dynamic_epp" cmdline and "dynamic_epp" sysfs cpufreq/amd-pstate: Add dynamic EPP as an "energy_performance_preference" mode cpufreq/amd-pstate: Extract platform profile to EPP conversion into a helper cpufreq/amd-pstate: Remove the defensive check for bios_min_perf cpufreq/amd-pstate: Set min_limit_freq based on bios_min_perf
2026-07-31Merge tag 'sound-7.2-rc6' of ↵Linus Torvalds1-1/+0
git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound Pull sound fixes from Takashi Iwai: "A collection of sound fixes for the 7.2-rc6 cycle. Again, it became far larger than wished; I'll throttle from now on. There are no major changes, just a normal flow of small fixes. The majority of them are device-specific quirks and ASoC SDCA/codec updates, but it includes a few ALSA core fixes as well. ALSA Core: - Fix for ALSA sequencer timer division-by-zero - Fix potential race in ALSA timer core - Wake up linked drain waiters on PCM stream unlink - Fix double-free of converter objects on UMP rawmidi error path USB-audio: - Fix a few potential out-of-bounds access bugs - Prevent stack info leak in RME Digiface status - Fix UAF during UMP endpoint destruction - Fix UAF at error handling during probe in Line6 6fire driver - Quirks for C-Media CM6206, Corsair Virtuoso, Razer Barracuda X 2.4, JKY Technology, and generic USB headphones HD-audio: - Quirks for HP Victus 16, HP Dragonfly Folio G3, Lenovo Legion 7, HP Laptop 14s, Acer Nitro 5, TongFang X6SP45xU, Infinix INBOOK X3, and HP Pavilion All-in-One ASoC: - Comprehensive cleanups and bug fixes for SoundWire/SDCA drivers - DMI quirks for AMD ACP/YC on Lenovo Legion 7, Acer Aspire, MSI Crosshair A16, and ASUS ExpertBook - ACPI match table entry for SOF RT5682 on Intel Nova Lake - Device-specific mixer / clock, irq fixes for TI TAS2562, TI TAS2781, Sophgo cv1800b ADC, Maxim MAX98090/98095, FSL ASRC/EASRC and Realtek RT5640" * tag 'sound-7.2-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (53 commits) ASoC: rt722: reset codec to fix abnormal sound ASoC: dt-bindings: realtek,rt5640: Make interrupts optional ALSA: hda/realtek: Add mute LED quirk for HP Victus 16-e0xxx (MB 88ED) ALSA: usb-audio: Add GET_SAMPLE_RATE quirk for C-Media CM6206 ALSA: usb-audio: Clamp frame size in implicit-feedback mode ALSA: usb-audio: Fix DMA buffer out-of-bounds write when fill_max is set ALSA: usb-audio: Add quirk for Corsair Virtuoso (later revision) ALSA: pcm: wake linked drain waiters on unlink ASoC: amd: acp: Add DMI quirk for Lenovo Legion 7 15ASH11 ASoC: sophgo: return 1 on volume change in cv1800b_adc_volume_set() ASoC: tas2781: Use correct calibration data for SINEGAIN2 register ASoC: SDCA: Move kcontrol search out of IRQ ASoC: SDCA: Switch to fixup_controls callback for IRQ registration ASoC: Add a component fixup_controls callback ASoC: SDCA: Populate IRQ data earlier ASoC: SDCA: Remove devm from primary IRQ cleanup ASoC: SDCA: Add sdca_irq_cleanup_late() ASoC: SDCA: Rename sdca_irq_allocate() to include devm ALSA: hda/realtek: Add quirk for HP Dragonfly Folio G3 2-in-1 (103c:8a05) ALSA:hda/realtek:ALC269 fixup for Legion 7 15ASH11 Mic Mute LED ...
2026-07-31regulator: handle regulator late cleanup race with PM suspendMark Brown23-350/+475
Joy Zou <joy.zou@oss.nxp.com> says: The regulator_init_complete_work fires ~30s after boot to disable unused regulators via I2C. When this work races with PM suspend, the I2C adapter may already be suspended, causing a -ESHUTDOWN warning dump. This series addresses the race and adds proper suspend power management for unused LDO regulators. Link: https://patch.msgid.link/20260731-b4-regulator-pf01-v2-0-a406c8737fdb@oss.nxp.com
2026-07-31Merge branch 'for-7.3/dt-bindings' into for-7.3/arm64/dtThierry Reding6-5/+10
2026-07-31dt-bindings: arm: tegra: Add lenovo,thinkedge-se70 compatible stringJiqi Li1-0/+5
Lenovo ThinkEdge SE70 is a fanless industrial edge gateway carrier board based on NVIDIA Tegra194 (Xavier NX) SOM. Add the corresponding compatible string for device tree validation. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Jiqi Li <lijq9@lenovo.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-07-31dt-bindings: perf: marvell: Add CN20K DDR PMU bindingGeetha sowjanya1-1/+7
Marvell CN20K SoCs integrate a DDR Performance Monitoring Unit (PMU) associated with the DDR controller. The block provides hardware counters to monitor DDR traffic and performance events and is accessed via a dedicated MMIO region. The CN20K DDR PMU is functionally equivalent to the CN10K DDR PMU, with minor register offset differences. Signed-off-by: Geetha sowjanya <gakula@marvell.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Will Deacon <will@kernel.org>
2026-07-31mm/slab: skip kfence objects in allocation profilingVlastimil Babka (SUSE)1-0/+7
struct kfence_metadata only contains struct slabobj_ext with CONFIG_MEMCG, which is then used for the "fake" slab's obj_exts field. If CONFIG_MEMCG is enabled, the struct can also end up used for memory allocation profiling. If CONFIG_MEMCG is disabled but profiling is enabled, it will end up allocating its obj_exts via prepare_slab_obj_exts_hook() and assigning them to the fake struct slab. These will probably then never be freed. So things sorta work, but not always in the intended and optimal way. The upcoming changes to slabobj_ext layout would additionally need a proper refactoring to keep working. However, there's little benefit in accounting KFENCE objects. KFENCE allocations are rare and there can be only CONFIG_KFENCE_NUM_OBJECTS (default to 255) outstanding ones at any time. For any callsite prominent enough in the memory allocation profiling stats, allocations served from KFENCE will be lost in the noise. Thus let's not complicate things and simply stop accounting KFENCE objects in allocation profiling and skip them in the related slab hooks. We also need to skip kfence objects in mark_obj_codetag_empty() in case a sheaf is allocated from kfence, per earlier sashiko review. Link: https://patch.msgid.link/20260727-b4-objext_split-v3-1-c29ef0f1f257@kernel.org Reviewed-by: Hao Li <hao.li@linux.dev> Signed-off-by: Vlastimil Babka (SUSE) <vbabka@kernel.org>
2026-07-31dt-bindings: display: msm: qcm2290: Add Shikra MDSSNabige Aala3-8/+21
Shikra reuses the same MDSS/DPU 6.5 hardware as QCM2290. Extend the existing qcm2290 bindings to cover Shikra by adding fallback compatible chains for MDSS, DPU and DSI controller nodes rather than introducing a separate binding file. Signed-off-by: Nabige Aala <nabige.aala@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Loic Poulain <loic.poulain@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/731152/ Link: https://lore.kernel.org/r/20260608-shikra-display-v4-1-88a846afdd5d@oss.qualcomm.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2026-07-31ASoC: qcom: audioreach: support WSA speakers only on WSA2Mark Brown1-0/+1
Neil Armstrong <neil.armstrong@linaro.org> says: The Qualcom SM8650 based Ayaneo Pocket S2 gaming device has a set of 2 WSA speakers connected on the WSA2 lines. But the Audioreach DSP only handles WSA2 in pair with the WSA interface by using the upper bits of the active_channels_mask for WSA2 and the lower bits for WSA: __________________________________________________ | Bits | 3 | 2 | 1 | 0 | --------------------------------------------------- | Line | WSA2 Ch2 | WSA2 Ch1 | WSA Ch2 | WSA Ch1 | --------------------------------------------------- Setting only the WSA2 upper bits is perfectly valid and functional but the current Audioreach code builds the bitmask from the channels count with: active_channels_mask = (1 << num_channels) - 1; In order to enable the WSA2 bits the channel count should be 4, but the lower WSA bits are then also enabled and the DSP errors out when trying to play on the disabled WSA interface. A solution would've been to add a fake WSA2 topology element which would be translated into the top bits only, but it's not clean and add some special exceptions in the generic Audioreach code. The solution suggested by Srinivas is to use the channel mapping to set this bitmask. This works but makes all the other calls using the channel mapping fail because the DSP requires the channel_mapping table to start from index 0 and using num_channel length in order to apply the mapping on the active_channels_mask bits in order. So if you have an active_channels_mask like: _______________________ | Bits | 3 | 2 | 1 | 0 | ------------------------- | Mask | 1 | 1 | 0 | 0 | ------------------------ And the channel mapping: _________________________________ | Channel | 3 | 2 | 1 | 0 | ----------------------------------- | Mapping | FR | FL | NULL | NULL | ----------------------------------- Will need to be converted to: ____________________ | Channel | 1 | 0 | --------------------- | Mapping | FR | FL | --------------------- And the DSP will map FR on WSA2 Ch2 and FL on WSA2 Ch1 as: _________________________________ | Line | WSA2 Ch2 | WSA2 Ch1 | ---------------------------------- | Mapping | FR | FL | ---------------------------------- So we need to skip the empty channel mapping entries in all other users of the channel_map to build valid channel_mapping tables. This should not break any other usecases since the default channel mapping always start from index 0, and will add flexibilty to allow some special non linear mapping for other interfaces as well. Finally we add a special prepare callback for the Ayaneo PS2 sound card which sets the custom channel mapping for the WSA interface to make audio work properly on the gaming device. Link: https://patch.msgid.link/20260728-topic-sm8650-ayaneo-pocket-s2-wsa2-fix-v3-0-b29f44720178@linaro.org
2026-07-31ASoC: dt-bindings: qcom,sm8250: Add Ayaneo Pocket S2 sound cardNeil Armstrong1-0/+1
Document the bindings for the sound card on the Ayaneo Pocket S2 which uses the special speaker connection incompatible with the default SM8650 sound card. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patch.msgid.link/20260728-topic-sm8650-ayaneo-pocket-s2-wsa2-fix-v3-2-b29f44720178@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2026-07-31docs: ntsync: align ioctl names and struct layouts with uapiIván Ezequiel Rodriguez1-16/+17
The uAPI documentation used outdated or conceptual ioctl macro names and listed ntsync_event_args / ntsync_wait_args fields in the wrong order. Match include/uapi/linux/ntsync.h and note that absolute MONOTONIC timeouts are interpreted in the caller's time namespace. Signed-off-by: Iván Ezequiel Rodriguez <ivanrwcm25@gmail.com> Reviewed-by: Elizabeth Figura <zfigura@codeweavers.com> Signed-off-by: Elizabeth Figura <zfigura@codeweavers.com> Link: https://patch.msgid.link/20260723201301.11826-5-zfigura@codeweavers.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-07-31dt-bindings: nvmem: qfprom: Add ipq5210 & ipq9650 compatibleVaradarajan Narayanan1-0/+2
Document compatible string for the QFPROM on ipq5210 & ipq9650 platforms. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com> Signed-off-by: Srinivas Kandagatla <srini@kernel.org> Link: https://patch.msgid.link/20260729094647.111468-15-srini@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-07-31dt-bindings: misc: qcom,fastrpc: Add Maili FastRPC compatibleYijie Yang1-0/+1
Document compatible string for the FastRPC interface on the Qualcomm Maili SoC, which is compatible with the Qualcomm Kaanapali FastRPC and can fallback to Kaanapali. Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Srinivas Kandagatla <srini@kernel.org> Link: https://patch.msgid.link/20260729094352.111065-10-srini@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-07-31dt-bindings: misc: qcom,fastrpc: Document Nord FastRPCShawn Guo1-0/+3
Add compatible for Qualcomm Nord FastRPC which is compatible with Kaanapali FastRPC. As there are 4 CDSPs on Nord, add label for cdsp2 and cdsp3 as well. Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Reviewed-by: Ekansh Gupta <ekansh.gupta@oss.qualcomm.com> Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com> Signed-off-by: Srinivas Kandagatla <srini@kernel.org> Link: https://patch.msgid.link/20260729094352.111065-9-srini@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-07-31Merge tag 'svc_updates_for_v7.3' of ↵Greg Kroah-Hartman3-0/+93
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into char-misc-next SoCFPGA firmware updates for v7.3 - Document stratix10-rsu for QSPI size and erase size - Add method to retrieve device info table using RSU - Add support for hardware monitoring using service driver Resolves merge conflicts in: drivers/firmware/stratix10-svc.c Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> * tag 'svc_updates_for_v7.3' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: hwmon: add Altera SoC FPGA hardware monitoring driver firmware: stratix10-svc: add async HWMON read commands and register socfpga-hwmon device firmware: stratix10-rsu: Add synchronous fallback for async SVC operations firmware: stratix10-rsu: Add flash device info retrieval via SMC Documentation: ABI: add stratix10-rsu QSPI size and erase_size sysfs
2026-07-31Remove excl arg to ->create inode_operationNeilBrown3-2/+10
The only time that 'false' is passed as the 'excl' arg to the ->create inode_operation is in lookup_open() when ->atomic_open is not provided by the parent directory. *all* directory inode_operations which do not have ->atomic_open completely ignore the 'excl' arg. Therefore we don't need the 'excl' arg. Those few ->create operations which pay attention to the arg are only ever called with a value of 'true'. We remove that arg and change all ->create operations to behave as those thhe arg were 'true'. Signed-off-by: NeilBrown <neil@brown.name> Link: https://patch.msgid.link/178290671516.27465.15984496764174914338@noble.neil.brown.name Reviewed-by: Jori Koolstra <jkoolstra@xs4all.nl> Reviewed-by: Jan Kara <jack@suse.cz> Signed-off-by: Christian Brauner (Amutable) <brauner@kernel.org>
2026-07-31docs: filesystems: porting: fix spelling of returned and insteadYuhong Cheng1-1/+1
Fix the spelling of 'rreturned' and 'instread' in the LOOKUP_EXCL section. Signed-off-by: Yuhong Cheng <ceohunk@gmail.com> Link: https://patch.msgid.link/20260705072609.1692-1-ceohunk@gmail.com Acked-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Christian Brauner (Amutable) <brauner@kernel.org>
2026-07-31media: dt-bindings: media: renesas,vsp1: Document RZ/T2H and RZ/N2H SoCsLad Prabhakar1-1/+16
Document the VSP2 blocks present on the RZ/T2H and RZ/N2H SoCs. The VSP2 implementation on these SoCs is identical to that on the RZ/G2L SoC. Update the schema to disallow the "resets" property for these SoCs to reflect the hardware integration. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20260430100929.1088281-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2026-07-31media: dt-bindings: media: renesas,fcp: Document RZ/T2H and RZ/N2H SoCsLad Prabhakar1-1/+17
Document the FCPVD blocks present on the RZ/T2H and RZ/N2H SoCs. The FCPVD implementation on these SoCs is identical to that found on the RZ/G2L family. Update the schema to disallow the "resets" property for these SoCs, reflecting the absence of a reset control for the FCPVD instance. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20260430100929.1088281-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2026-07-31dt-bindings: i3c: Add mipi-i3c-static-method to support SETAASAAkhil R1-5/+31
Add the 'mipi-i3c-static-method' property mentioned in the MIPI I3C Discovery and Configuration Specification [1] to specify which discovery method an I3C device supports during bus initialization. The property is a bitmap, where a bit value of 1 indicates support for that method, and 0 indicates lack of support. Bit 0: SETDASA CCC (Direct) Bit 1: SETAASA CCC (Broadcast) Bit 2: Other CCC (vendor / standards extension) All other bits are reserved. It is specifically needed when an I3C device requires SETAASA for the address assignment. SETDASA will be supported by default if this property is absent, which means for now the property just serves as a flag to enable SETAASA, but keep the property as a bitmap to align with the specifications. [1] https://www.mipi.org/mipi-disco-for-i3c-download Reviewed-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Akhil R <akhilrajeev@nvidia.com> Link: https://patch.msgid.link/20260728065955.809445-2-akhilrajeev@nvidia.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2026-07-31dt-bindings: i3c: dw: Document missing optional core resetShubham Patil1-0/+3
The DesignWare I3C master IP supports a core reset input, but the binding is missing the corresponding reset description. Document the optional reset property. Keep it optional because the reset line is integration-specific. Signed-off-by: Shubham Patil <shubhamsanjay.patil@amd.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> Link: https://patch.msgid.link/20260720073510.1869623-2-shubhamsanjay.patil@amd.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2026-07-31dt-bindings: i3c: cdns: add Axiado AX3005 I3C variantSwark Yang1-0/+1
Add binding for Axiado AX3005 I3C master. So far, no changes are known, so it can fall back to the cdns,i3c-master compatible. Signed-off-by: Swark Yang <syang@axiado.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260716-upstream-axiado-ax3005-upstream-v3-4-c429095143ec@axiado.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2026-07-31dt-bindings: i3c: Add AMD I3C master controller supportManikanta Guntupalli1-0/+58
Add device tree binding documentation for the AMD I3C master controller version 1.0. Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com> Co-developed-by: Shubham Patil <shubhamsanjay.patil@amd.com> Signed-off-by: Shubham Patil <shubhamsanjay.patil@amd.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> Link: https://patch.msgid.link/20260709064233.1451482-2-shubhamsanjay.patil@amd.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2026-07-31media: dt-bindings: nxp,imx8-isi: Drop fsl,blk-ctrl requirement for i.MX8ULPGuoniu Zhou1-1/+3
The i.MX8ULP variant does not require the fsl,blk-ctrl property. Add fsl,imx8ulp-isi to the exception list alongside fsl,imx91-isi. Fixes: 288517a3c6c9 ("dt-bindings: media: nxp,imx8-isi: Add i.MX8ULP ISI compatible string") Cc: stable@vger.kernel.org Signed-off-by: Guoniu Zhou <guoniu.zhou@oss.nxp.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20260424-csi2_imx8ulp-v12-1-da148eabc035@oss.nxp.com Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2026-07-31dma-mapping: Add internal shared allocation attributeAneesh Kumar K.V (Arm)1-0/+29
DMA_ATTR_CC_SHARED describes an existing DMA mapping whose backing memory is already shared, or decrypted, for confidential computing. It is a mapping attribute: callers use it to request a shared DMA address encoding for memory that has already been prepared for shared DMA. Allocation paths need a related but different state. Once the DMA core decides that an allocation must use shared backing pages, the lower-level allocation helpers need to select shared pools, decrypt newly allocated pages, derive the DMA address with the shared-memory translation and restore encryption on free. That state is internal to the DMA-mapping implementation and should not be passed by drivers to dma_alloc_attrs(). Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Signed-off-by: Aneesh Kumar K.V (Arm) <aneesh.kumar@kernel.org> Reviewed-by: Mostafa Saleh <smostafa@google.com> Link: https://lore.kernel.org/r/20260717180442.110954-10-aneesh.kumar@kernel.org Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
2026-07-30KVM: arm64: Add KVM_ARM_VCPU_PMU_V3_STRICT vCPU featureCongkai Tan2-2/+20
Introduce a new vCPU feature KVM_ARM_VCPU_PMU_V3_STRICT. When set, KVM does not create a default PMU when initializing the vCPU, and userspace must select one explicitly via KVM_ARM_VCPU_PMU_V3_SET_PMU before the first KVM_RUN. The flag forces the VMM to be aware of the PMU implementation of the guest to be created, so that certain information about the PMU becomes deterministic (if on a heterogeneous system) and becomes safe to be exposed to the guest. It can be used as an umbrella flag to gate future PMUv3 UAPI changes. When no default PMU is created, kvm->arch.arm_pmu stays NULL until SET_PMU runs, so kvm_arm_pmu_v3_init() now refuses to run if kvm->arch.arm_pmu is NULL. Signed-off-by: Congkai Tan <congkai@amazon.com> Reviewed-by: Geoff Blake <blakgeof@amazon.com> Reviewed-by: Haris Okanovic <harisokn@amazon.com> Reviewed-by: Stanislav Spassov <stanspas@amazon.de> Co-developed-by: Oliver Upton <oupton@kernel.org> Reviewed-by: Fuad Tabba <fuad.tabba@linux.dev> Tested-by: Fuad Tabba <fuad.tabba@linux.dev> Link: https://patch.msgid.link/20260722202702.4165917-5-congkai@amazon.com Signed-off-by: Oliver Upton <oupton@kernel.org>
2026-07-30dt-bindings: clock: qcom,a53pll: Add IPQ5210 compatibleVaradarajan Narayanan1-0/+1
Add the qcom,ipq5210-a53pll compatible for the A53 PLL found on IPQ5210 SoCs. Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260703-apss-clk-v3-1-4785e89a9c58@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-30dt-bindings: clock: qcom: Add Qualcomm Maili video clock controllerJagadeesh Kona1-0/+2
Add device tree bindings for the video clock controller on Qualcomm Maili SoC. Signed-off-by: Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260717-maili_videocc-v3-1-6656694b06a7@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-30dt-bindings: clock: qcom: Add Qualcomm Shikra GPU clock controllerImran Shaik1-1/+3
The Qualcomm Shikra GPU clock controller is similar to QCM2290 GPUCC hardware block, with same set of clocks and minor other differences. Hence reuse the QCM2290 header file for Shikra and document the Qualcomm Shikra GPUCC compatible. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Imran Shaik <imran.shaik@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260718-shikra-dispcc-gpucc-v6-14-62703e05ef0f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-30dt-bindings: clock: qcom: Add Qualcomm Shikra Display clock controllerImran Shaik1-1/+7
The Qualcomm Shikra Display clock controller has clocks same as QCM2290. Hence, add support to use the QCM2290 DISPCC compatible as fallback for Shikra DISPCC. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Imran Shaik <imran.shaik@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260718-shikra-dispcc-gpucc-v6-13-62703e05ef0f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-30dt-bindings: clock: qcom,qcm2290-dispcc: Add missing power-domains propertyImran Shaik1-0/+7
Add the missing power-domains property to associate DISPCC with RPMPD_CX. This is to ensure the genpd performance state votes on the GDSC to get propagated to the CX rail and to avoid the rail under-voltage conditions. This change breaks ABI, as the power-domains property is marked as required. Fixes: 85cedb4e0c9d ("dt-bindings: clock: Add qualcomm QCM2290 DISPCC bindings") Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Imran Shaik <imran.shaik@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260718-shikra-dispcc-gpucc-v6-1-62703e05ef0f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-30dt-bindings: clock: qcom: Add Qualcomm Shikra AudioCoreCC and AudioCoreCSRImran Shaik2-0/+97
Add device tree bindings for the Audio Core Clock Controller (AudioCoreCC) that provides clocks and Audio Core CSR that provides resets on Qualcomm Shikra SoC. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Imran Shaik <imran.shaik@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260724-shikra-audiocorecc-v4-1-0a89bb13d817@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-30dt-bindings: clock: qcom: Document Nord GPU clock controllersTaniya Das1-0/+4
Add Device Tree binding documentation for the GPU clock controllers on the Qualcomm Nord platform. The platform includes two GPU clock controller instances, GPUCC and GPU2CC. Document the compatible strings for both controllers. Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Shawn Guo <shengchao.guo@oss.qualcomm.com> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260724-nords_mm_v1-v3-5-32b45232217f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-30dt-bindings: clock: qcom: Document Nord display clock controllerTaniya Das1-0/+3
Add Device Tree binding documentation for the display clock controller on the Qualcomm Nord SoC. The Nord platform contains two instances of the display clock controller, DISPCC_0 and DISPCC_1. Update the bindings to include compatible strings for both instances. Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Shawn Guo <shengchao.guo@oss.qualcomm.com> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260724-nords_mm_v1-v3-3-32b45232217f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-30dt-bindings: soc: qcom,aoss-qmp: Document Nord AOSS side channelShawn Guo1-0/+1
Document Always-on Subsystem side channel on Qualcomm Nord SoC. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260729023508.879752-2-shengchao.guo@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-30dt-bindings: remoteproc: qcom,milos-pas: Move Eliza ADSP to SM8550 schemaAbel Vesa2-3/+2
The ADSP PAS found on Eliza SoC looks fully compatible with SM8750, which can fallback to SM8550 except for the extra interrupt ("shutdown-ack"). So document its bindings in the SM8550 schema instead. Fixes: 7cf2f07f949c ("dt-bindings: remoteproc: qcom,milos-pas: Document Eliza ADSP") Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260722-dts-qcom-eliza-fix-adsp-binding-v2-1-e1e98ae15533@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-30docs: ABI: zram: fix spelling mistakesArukonda Rahul1-3/+3
Fix spelling mistakes in the zram sysfs ABI documentation. Link: https://lore.kernel.org/20260707165131.4408-1-rahularukonda2@gmail.com Signed-off-by: Arukonda Rahul <rahularukonda2@gmail.com> Reviewed-by: Sergey Senozhatsky <senozhatsky@chromium.org> Cc: Minchan Kim <minchan@kernel.org> Cc: Richard Chang <richardycc@google.com> Cc: Jonathan Corbet <corbet@lwn.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2026-07-30mm: move __alloc_pages() to mm/page_alloc.hBrendan Jackman2-2/+2
It's no longer used outside of mm/. Since this means __alloc_pages_noprof() is no longer visible from gfp.h, this also means moving the definition of alloc_pages_node_noprof into the .c file. Also remove references to this API from the documentation tree - referring to the specific function name was already questionable but now the function is not even public it definitely seems wrong. Link: https://lore.kernel.org/20260703-alloc-trylock-v5-14-c87b714e19d3@google.com Signed-off-by: Brendan Jackman <jackmanb@google.com> Reviewed-by: Vlastimil Babka (SUSE) <vbabka@kernel.org> Reviewed-by: Zi Yan <ziy@nvidia.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2026-07-30Docs/ABI/damon: document probe filesSJ Park1-0/+40
DAMON ABI document is not updated for the DAMON probe sysfs files. Update. Link: https://lore.kernel.org/20260630141726.92246-3-sj@kernel.org Signed-off-by: SJ Park <sj@kernel.org> Cc: Brendan Higgins <brendan.higgins@linux.dev> Cc: David Hildenbrand <david@kernel.org> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Liam R. Howlett <liam@infradead.org> Cc: Lorenzo Stoakes <ljs@kernel.org> Cc: Michal Hocko <mhocko@suse.com> Cc: Mike Rapoport <rppt@kernel.org> Cc: Shuah Khan <shuah@kernel.org> Cc: Suren Baghdasaryan <surenb@google.com> Cc: Vlastimil Babka <vbabka@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2026-07-30Docs/mm/damon/design: update for DAMOS_QUOTA_NODE_ELIGIBLE_MEM_BPSJ Park1-2/+4
Patch series "mm/damon: update, optimize, and clean up doc, tests, and code". Patches 1 and 2 update the design and ABI documents for recently added DAMON features. Patches 3-7 add or update more unit and self tests for DAMON to cover recently changed or added functions and sysfs files. Patch 8 optimizes damon_commit_target_regions() to skip unnecessary adjacent ranges setup. Patches 9-11 clean and fix up recently added DAMON sysfs interface code for readability. This patch (of 11): Commit 9138e27a3bc3 ("mm/damon: add node_eligible_mem_bp goal metric") introduced DAMOS_QUOTA_NODE_ELIGIBLE_MEM_BP but forgot updating the DAMON design document for that. Update. Link: https://lore.kernel.org/20260630141726.92246-1-sj@kernel.org Link: https://lore.kernel.org/20260630141726.92246-2-sj@kernel.org Signed-off-by: SJ Park <sj@kernel.org> Cc: Brendan Higgins <brendan.higgins@linux.dev> Cc: David Hildenbrand <david@kernel.org> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Liam R. Howlett <liam@infradead.org> Cc: Lorenzo Stoakes <ljs@kernel.org> Cc: Michal Hocko <mhocko@suse.com> Cc: Mike Rapoport <rppt@kernel.org> Cc: SeongJae Park <sj@kernel.org> Cc: Shuah Khan <shuah@kernel.org> Cc: Suren Baghdasaryan <surenb@google.com> Cc: Vlastimil Babka <vbabka@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2026-07-30Docs/{admin-guide,mm}/damon: fix DAMON documentation detailsDoehyun Baek2-10/+10
Fix minor DAMON documentation issues. Correct the sysfs scheme file name apply_interval_us, the DAMON_STAT module count, a malformed reference, a misplaced label indentation, and a few typos. Link: https://lore.kernel.org/20260629145538.134832-4-sj@kernel.org Signed-off-by: Doehyun Baek <doehyunbaek@gmail.com> Signed-off-by: SJ Park <sj@kernel.org> Reviewed-by: SJ Park <sj@kernel.org> Cc: David Hildenbrand <david@kernel.org> Cc: Lorenzo Stoakes <ljs@kernel.org> Cc: "Liam R. Howlett" <liam@infradead.org> Cc: Vlastimil Babka <vbabka@kernel.org> Cc: Mike Rapoport <rppt@kernel.org> Cc: Suren Baghdasaryan <surenb@google.com> Cc: Michal Hocko <mhocko@suse.com> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Shuah Khan <skhan@linuxfoundation.org> Cc: Akinobu Mita <akinobu.mita@gmail.com> Cc: Asier Gutierrez <gutierrez.asier@huawei-partners.com> Cc: Brendan Higgins <brendan.higgins@linux.dev> Cc: Philippe Laferriere <plafer@proton.me> Cc: Sailesh Nandanavanam <saileshnandanavanam@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2026-07-30Merge tag 'for-v7.2-rc' of ↵Linus Torvalds1-0/+1
git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-power-supply Pull power supply fixes from Sebastian Reichel: - Documentation build fix for bd71828 - max17040: handle missing status supplier - macsmc: Support macOS 27 SMC firmware - bq25890: fix the -10 C NTC lookup entry * tag 'for-v7.2-rc' of git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-power-supply: power: supply: bq25890: fix the -10 C NTC lookup entry power: supply: macsmc: Support macOS 27 SMC firmware power: supply: max17040: handle missing status supplier power: supply: bd71828: add a terminating table border
generated by cgit (git 2.54.0.dirty) at 2026-09-22 19:42:28 +0000