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2026-06-12Documentation: process: fix bracketsManuel Ebner2-2/+2
Fix missing ')' and needless ')' Signed-off-by: Manuel Ebner <manuelebner@mailbox.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Jonathan Corbet <corbet@lwn.net> Message-ID: <20260611064311.117023-2-manuelebner@mailbox.org>
2026-06-12Documentation: arch: fix bracketsManuel Ebner8-18/+18
Add missing and remove needless parentheses, brackets and curly braces. Fix typos. Signed-off-by: Manuel Ebner <manuelebner@mailbox.org> Reviewed-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Jonathan Corbet <corbet@lwn.net> Message-ID: <20260612095432.177759-2-manuelebner@mailbox.org>
2026-06-12block: add configurable error injectionChristoph Hellwig2-0/+60
Add a new block error injection interface that allows to inject specific status code for specific ranges. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Damien Le Moal <dlemoal@kernel.org> Reviewed-by: Hannes Reinecke <hare@kernel.org> Reviewed-by: Md Haris Iqbal <haris.iqbal@linux.dev> Link: https://patch.msgid.link/20260611140703.2401204-5-hch@lst.de Signed-off-by: Jens Axboe <axboe@kernel.dk>
2026-06-12docs: dt: writing-schema: Clarify what is required in a schemaKrzysztof Kozlowski1-1/+1
Clarify that we do not require all properties from a binding, but above schema keywords/properties. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260609103550.234472-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-06-12dt-bindings: i2c: mux-gpio: name correct maintainerWolfram Sang1-1/+1
The YAML conversion added me as maintainer but I can't recall being asked nor do I want to maintain it. Add Peter as maintainer for the binding as he is maintainer of the driver. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Peter Korsgaard <peter.korsgaard@barco.com> Acked-by: Conor Dooley <conor.dooley@microchip.com>
2026-06-12ABI: sysfs-class-infiniband: minor cleanupManuel Ebner1-4/+4
Close parenthesis with ')'. Add '-': 64-bit counter. Link: https://patch.msgid.link/r/20260612122611.183127-2-manuelebner@mailbox.org Signed-off-by: Manuel Ebner <manuelebner@mailbox.org> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2026-06-12dt-bindings: cache: l2c2x0: Add missing power-domainsGeert Uytterhoeven1-0/+3
On Renesas SH-Mobile and R-Mobile SoCs, the ARM PL310 L2 Cache Controller is located in a controllable power area. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/0a57ab356e5f426e28ead373b809f88a63e55380.1781105151.git.geert+renesas@glider.be Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-06-12modpost: Handle malformed WMI GUID stringsArmin Wolf1-1/+1
Some WMI GUIDs found inside binary MOF files contain both uppercase and lowercase characters. Blindly copying such GUIDs will prevent the associated WMI driver from loading automatically because the WMI GUID found inside WMI device ids always contains uppercase characters. Avoid this issue by always converting WMI GUID strings to uppercase. Also verify that the WMI GUID string actually looks like a valid GUID. Signed-off-by: Armin Wolf <W_Armin@gmx.de> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Link: https://patch.msgid.link/20260610203453.816254-10-W_Armin@gmx.de Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2026-06-12Merge branches 'apple/dart', 'arm/smmu/updates', 'arm/smmu/bindings', ↵Joerg Roedel2-1/+114
'rockchip', 'verisilicon', 'riscv', 'intel/vt-d', 'amd/amd-vi' and 'core' into next
2026-06-12vsprintf: Add upper case flavour to %p[mM]Andy Shevchenko1-0/+3
Some of the (ABI aware) code needs an upper case when printing MAC addresses. Introduce an extension for that into the existing %p[mM]. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Petr Mladek <pmladek@suse.com> Link: https://patch.msgid.link/20260603104351.152085-2-andriy.shevchenko@linux.intel.com Signed-off-by: Petr Mladek <pmladek@suse.com>
2026-06-12Merge tag 'kvmarm-7.2' of ↵Paolo Bonzini2-5/+8
git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD KVM/arm64 updates for 7.2 * New features: - None. Zilch. Nada. Que dalle. * Fixes and other improvements: - Significant cleanup of the vgic-v5 PPI support which was merged in 7.1. This makes the code more maintainable, and squashes a couple of bugs in the meantime. - Set of fixes for the handling of the MMU in an NV context, particularly VNCR-triggered faults. S1POE support is fixed as well. - Large set of pKVM fixes, mostly addressing recurring issues around hypervisor tracking of donated pages in obscure cases where the donation could fail and leave things in a bizarre state. - Fixes for the so-called "lazy vgic init", which resulted in sleeping operations in non-preemptible sections. This turned out to be far more invasive than initially expected... - Reduce the overhead of L1/L2 context switch by not touching the FP registers. - Fix the way non-implemented page sizes are dealt with when a guest insist on using them for S2 translation. - The usual set of low-impact fixes and cleanups all over the map.
2026-06-12Merge tag 'thunderbolt-for-v7.2-rc1' of ↵Greg Kroah-Hartman2-0/+144
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/westeri/thunderbolt into usb-next Mika writes: thunderbolt: Changes for v7.2 merge window This includes following USB4/Thunderbolt changes for the v7.2 merge window: - Make the driver more compliant with the connection manager guide. - Improvements over Thunderbolt XDomain service handling. - USB4STREAM driver. - Split out PCIe bits into pci.c to allow the driver to work on non-PCIe hosts as well. - Various fixes and improvements. All these have been in linux-next with no reported issues. * tag 'thunderbolt-for-v7.2-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/westeri/thunderbolt: (41 commits) thunderbolt: debugfs: Fix sideband write size check thunderbolt: debugfs: Fix margining error counter buffer leak thunderbolt: test: Release third DP tunnel thunderbolt: Prevent XDomain delayed work use-after-free on disconnect thunderbolt: test: Add KUnit tests for property parser bounds checks thunderbolt: Add some more descriptive probe error messages thunderbolt: Require nhi->ops be valid thunderbolt: Separate out common NHI bits thunderbolt: Move pci_device out of tb_nhi thunderbolt: Increase Notification Timeout to 255 ms for USB4 routers thunderbolt: Increase timeout for Configuration Ready bit thunderbolt: Verify Router Ready bit is set after router enumeration thunderbolt: Verify PCIe adapter in detect state before tunnel setup thunderbolt: Activate path hops from source to destination thunderbolt: Fix lane bonding log when bonding not possible thunderbolt: Don't access path config space on Lane 1 adapters in tb_switch_reset_host() thunderbolt: Improve multi-display DisplayPort tunnel allocation docs: admin-guide: thunderbolt: Add instructions how to use USB4STREAM thunderbolt: Add support for USB4STREAM thunderbolt: Add support for ConfigFS ...
2026-06-12Merge tag 'kvm-x86-svm-7.2' of https://github.com/kvm-x86/linux into HEADPaolo Bonzini1-0/+26
KVM SVM changes for 7.2 - Add support for virtualizing gPAT (KVM previously just used L1's PAT when running L2). - Fix goofs where KVM mishandles side effects (e.g. single-step and PMC updates) when emulating VMRUN. - Fix a variety of bugs in AVIC's handling of x2APIC MSR interception, most notably where KVM didn't disable interception of IRR, ISR, and TMR regs. - Add support for virtualizing Host-Only/Guest-Only bits in the mediated PMU.
2026-06-12Merge tag 'kvm-x86-misc-7.2' of https://github.com/kvm-x86/linux into HEADPaolo Bonzini1-0/+5
KVM misc x86 changes for 7.2 - Handle EXIT_FASTPATH_EXIT_USERSPACE in vendor code to ensure vendor code gets a chance to handle things like reaping the PML buffer. - Ensure KVM's copy of CR0 and CR3 are up-to-date on SVM prior to invoking fastpath handlers. - Update KVM's view of PV async enabling if and only if the MSR write fully succeeds. - Fix a variety of issues where the emulator doesn't honor guest-debug state, and clean up related code along the way. - Synthesize EPT Violation and #NPF "error code" bits when injecting faults into L1 that didn't originate in hardware (in which case the VMCS/VMCB doesn't hold relevant information). - Add support for virtualizing (well, emulating) AMD's flavor of CPL>0 CPUID faulting. - Clean up the GPR APIs so that KVM's use of "raw" is consistent, and fix a variety of minor bugs along the way. - Fix an OOB memory access due to not checking the VP ID when handling a Hyper-V PV TLB flush for L2. - Fix a bug in the mediated PMU's handling of fixed counters that allowed the guest to bypass the PMU event filter. - Allow userspace to return EAGAIN when handling SNP and TDX hypercalls, so the KVM can forward a "retry" status code to the guest, and reserve all unused error codes for future usage. - Misc fixes and cleanups.
2026-06-12Merge branch kvm-arm64/vgic-v5-PPI-fixes into kvmarm-master/nextMarc Zyngier2-5/+8
* kvm-arm64/vgic-v5-PPI-fixes: : . : Substantial cleanup of the vgic-v5 PPI support. From the original : cover letter: : : "With the GICv5 PPi support merged in, it has become obvious that a few : things could be improved, both from the correctness and maintainability : angles." : . KVM: arm64: Fix arch timer interrupts for GICv3-on-GICv5 guests irqchip/gic-v5: Immediately exec priority drop following activate Documentation: KVM: Clarify that PMU_V3_IRQ IntID requirements for GICv5 Documentation: KVM: Fix typos in VGICv5 documentation KVM: arm64: selftests: Improve error handling for GICv5 PPI selftest KVM: arm64: selftests: Cleanup unused vars in GICv5 PPI selftest KVM: arm64: selftests: Add missing GIC CDEN to no-vgic-v5 selftest KVM: arm64: vgic-v5: Atomically assign bits to PPI DVI bitmap KVM: arm64: vgic-v5: Add missing trap handing for NV triage KVM: arm64: vgic-v5: Limit support to 64 PPIs KVM: arm64: vgic: Rationalise per-CPU irq accessor KVM: arm64: vgic-v5: Drop defensive checks from vgic_v5_ppi_queue_irq_unlock() KVM: arm64: vgic: Consolidate vgic_allocate_private_irqs_locked() KVM: arm64: vgic: Constify struct irq_ops usage KVM: arm64: vgic-v5: Drop pointless ARM64_HAS_GICV5_CPUIF check KVM: arm64: vgic-v5: Remove use of __assign_bit() with a constant KVM: arm64: vgic-v5: Move PPI caps into kvm_vgic_global_state KVM: arm64: vgic-v5: Add for_each_visible_v5_ppi() iterator Signed-off-by: Marc Zyngier <maz@kernel.org>
2026-06-12Merge tag 'kvm-s390-master-7.1-4' of ↵Paolo Bonzini2-2/+36
https://git.kernel.org/pub/scm/linux/kernel/git/kvms390/linux into HEAD KVM: s390: A few more misc gmap fixes.
2026-06-11dt-bindings: mailbox: qcom: Add IPCC support for Maili PlatformChunkai Deng1-0/+1
Document the Inter-Processor Communication Controller on the Qualcomm Maili Platform, which will be used to route interrupts across various subsystems found on the SoC. Signed-off-by: Chunkai Deng <chunkai.deng@oss.qualcomm.com> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2026-06-11mptcp: introduce add_addr_v6_port_drop_ts sysctl knobMatthieu Baerts (NGI0)1-0/+13
This sysctl is going to be used in the next commits to drop TCP timestamps option, to be able to send an ADD_ADDR with a v6 IP address and a port number. It is enabled by default. This knob is explicitly disabled in the MPTCP Join selftest, with the "signal addr list progresses after tx drop" subtest, to continue verifying the previous behaviour where the ADD_ADDR is not sent due to a lack of space. While at it, move syn_retrans_before_tcp_fallback down from struct mptcp_pernet, to avoid creating another 3 bytes hole. Reviewed-by: Mat Martineau <martineau@kernel.org> Signed-off-by: Matthieu Baerts (NGI0) <matttbe@kernel.org> Link: https://patch.msgid.link/20260605-net-next-mptcp-add-addr6-port-ts-v2-4-758e7ca73f4d@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-11dt-bindings: net: qca,ar803x: Add clocks for IPQ5018 PHYGeorge Moussalem1-0/+19
Further testing revealed that the RX and TX clocks of the IPQ5018 PHY need to be explicitly enabled. As such, add the required clocks to the schema. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: George Moussalem <george.moussalem@outlook.com> Link: https://patch.msgid.link/20260608-ipq5018-gephy-clocks-v4-2-fb2ccd56894b@outlook.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-11dt-bindings: net: ethernet-phy: increase max clock count to twoGeorge Moussalem1-3/+6
The clocks property has a restriction to maximum one. Yet, some PHYs may require more than 1 clock such as the IPQ5018 PHY which requires two clocks for RX and TX. As such, increase maxItems to two. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: George Moussalem <george.moussalem@outlook.com> Link: https://patch.msgid.link/20260608-ipq5018-gephy-clocks-v4-1-fb2ccd56894b@outlook.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-11Merge tag 'sunxi-dt-for-7.2-2' of ↵Arnd Bergmann2-0/+12
https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/dt Allwinner device tree changes for 7.2 - Take 2 Some changes for old chips and some for recent ones. - A83T gained the MIPI CSI-2 receiver - overlays enabled for Pine64 boards - D1s / T113 and H616 gained the high speed timer - T113s watchdog enabled (for reboot) - H616 gained proper SRAM regions - A523 family gained EL2 virtual timer interrupt and GPADC - A523 pinctrl IRQ fix * tag 'sunxi-dt-for-7.2-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: arm64: dts: allwinner: a523: Add missing GPIO interrupt arm64: dts: allwinner: a523: add gpadc node arm64: dts: allwinner: Add EL2 virtual timer interrupt ARM: dts: sun8i: a83t: Add MIPI CSI-2 controller node dt-bindings: media: sun6i-a31-isp: Add optional interconnect properties dt-bindings: media: sun6i-a31-csi: Add optional interconnect properties arm64: dts: allwinner: sun50i-a64: Enable DT overlays arm: dts: allwinner: t113s: enable watchdog for reboot arm64: dts: allwinner: h616: add hstimer node riscv: dts: allwinner: d1s-t113: add hstimer node arm64: dts: allwinner: sun50i-h616: Add SRAM nodes Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-06-11Merge tag 'imx-binding-7.2' of ↵Arnd Bergmann1-0/+1
git://git.kernel.org/pub/scm/linux/kernel/git/frank.li/linux into soc/dt i.MX DT Binding for 7.2 - Add compatible string for TI SN65LVDS93. * tag 'imx-binding-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/frank.li/linux: dt-bindings: display/lvds-codec: add ti,sn65lvds93 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-06-11ASoC: rockchip: Reorder clock enable sequenceMark Brown1-1/+1
bui duc phuc <phucduc.bui@gmail.com> says: This series reorders the runtime resume clock enable sequence in the Rockchip SPDIF and PDM drivers to enable the bus clock before the functional controller clock. It also updates the SPDIF DT binding clock descriptions to match the actual clock usage in the driver. Additionally, this v2 adds two new patches addressing issues reported by the Sashiko AI Review tool regarding regcache sync failure handling and runtime PM resume status validation. Testing: - Patch 1: Verified (dt_binding_check passed). - Patches 2 to 5: Compile tested only. Please help test if you have the relevant Rockchip hardware. Link: https://patch.msgid.link/20260602101608.45137-1-phucduc.bui@gmail.com
2026-06-11ASoC: dt-bindings: rockchip-spdif: Correct SPDIF clock descriptionsbui duc phuc1-1/+1
Update the binding descriptions to match the actual clock usage, where 'mclk' is the controller clock and 'hclk' is the bus clock. Signed-off-by: bui duc phuc <phucduc.bui@gmail.com> Link: https://patch.msgid.link/20260602101608.45137-2-phucduc.bui@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-06-11Merge branch 'pm-cpufreq'Rafael J. Wysocki4-9/+106
Merge cpufreq updates for 7.2: - Fix a race between cpufreq suspend and CPU hotplug during system shutdown (Tianxiang Chen) - Avoid redundant target() calls for unchanged limits and fix a typo in a comment in the cpufreq core (Viresh Kumar) - Fix concurrency issues related to sysfs attributes access that affect cpufreq governors using the common governor code (Zhongqiu Han) - Simplify frequency limit handling in the conservative cpufreq governor (Lifeng Zheng) - Fix descriptions of the conservative governor freq_step tunable and the ondemand governor sampling_down_factor tunable in the cpufreq documentation (Pengjie Zhang) - Fix use-after-free and double free during _OSC evaluation in the PCC cpufreq driver (Yuho Choi) - Rework the handling of policy min and max frequency values in the cpufreq core to allow drivers to specify special initial values for the scaling_min_freq and scaling_max_freq sysfs attributes (Pierre Gondois) - Add cpufreq scaling support for Qualcomm Shikra SoC (Taniya Das, Imran Shaik). - Improve the warning message on HWP-disabled hybrid processors printed by the intel_pstate driver and sync policy->cur during CPU offline in it (Yohei Kojima, Fushuai Wang) - Drop cpufreq support for AMD Elan SC4* (Sean Young) - Minor fixes for cpufreq drivers (Krzysztof Kozlowski, Akashdeep Kaur, Hans Zhang, Guangshuo Li, Xueqin Luo) - Clean up dead dependencies on X86 in the cpufreq Kconfig (Julian Braha) * pm-cpufreq: (25 commits) cpufreq: Use policy->min/max init as QoS request cpufreq: Remove driver default policy->min/max init cpufreq: Set default policy->min/max values for all drivers cpufreq: Extract cpufreq_policy_init_qos() function cpufreq: Documentation: fix conservative governor freq_step description cpufreq: ti: Add EPROBE_DEFER for K3 SoCs cpufreq: qcom: Add cpufreq scaling support for Qualcomm Shikra SoC dt-bindings: cpufreq: Document Qualcomm Shikra SoC EPSS cpufreq: governor: Fix stale prev_cpu_nice spike when enabling ignore_nice_load cpufreq: governor: Fix data races on per-CPU idle/nice baselines cpufreq: intel_pstate: Improve warning message on HWP-disabled hybrid CPUs cpufreq: elanfreq: Drop support for AMD Elan SC4* cpufreq: clean up dead dependencies on X86 in Kconfig cpufreq: conservative: Simplify frequency limit handling cpufreq: Avoid redundant target() calls for unchanged limits cpufreq: Fix typo in comment cpufreq: intel_pstate: Sync policy->cur during CPU offline cpufreq: Documentation: fix sampling_down_factor range cpufreq: Fix hotplug-suspend race during reboot cpufreq: pcc: fix use-after-free and double free in _OSC evaluation ...
2026-06-11Merge back earlier thermal control material for 7.2Rafael J. Wysocki7-6/+125
2026-06-11dt-bindings: phy: add support for NXPs TJA1145 CAN transceiverDimitri Fedrau1-0/+86
Adding documentation for NXPs TJA1145 CAN transceiver, which resides like the ti,tcan104x-can.yaml in the same directory as other generic PHY subsystem bindings. At the moment there is only support for simple PHYs by using regulator bindings in combination with can-transceiver.yaml or PHYs that implement the generic PHY subsystem like the NXP TJA1145. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Dimitri Fedrau <dimitri.fedrau@liebherr.com> Link: https://patch.msgid.link/20260602-tja1145-support-v6-1-0e0ffc8ee63d@liebherr.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-06-11dt-bindings: display/lvds-codec: add ti,sn65lvds93Hugo Villeneuve1-0/+1
Add compatible string for TI SN65LVDS93. Similar to SN65LVDS83 but with an industrial temperature range. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-06-11dt-bindings: pinctrl: Add UltraRISC DP1000 pinctrl controllerJia Wang1-0/+130
Add doc for the pinctrl controllers on the UltraRISC DP1000 RISC-V SoC. Signed-off-by: Jia Wang <wangjia@ultrarisc.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-06-11dt-bindings: pinctrl: tegra238: add missing AON pin groupsPrathamesh Shete1-3/+23
Add 24 pin groups, and their matching drive groups, on ports EE, FF, GG and HH to the Tegra238 AON pinmux binding. These groups are present on the AON pin controller, so device trees that mux these pins through it validate against the schema. Fixes: 9323f8a0e12c ("dt-bindings: pinctrl: Document Tegra238 pin controllers") Signed-off-by: Prathamesh Shete <pshete@nvidia.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-06-11platform/x86: asus-wmi: add keystone dongle supportDariusz Figzał1-0/+9
The ASUS Keystone is a physical NFC-like dongle that slots into supported ASUS laptops. The EC fires WMI notify code 0xB4 on insert/remove events. Expose the current insert state via a sysfs attribute by querying WMI device ID 0x00120091 (DSTS). This devid does not follow the standard DSTS convention: PRESENCE_BIT (0x00010000) encodes the insert state rather than feature presence, and STATUS_BIT is never set. Presence of a keystone slot is detected by a successful DSTS call. Reviewed-by: Denis Benato <denis.benato@linux.dev> Signed-off-by: Dariusz Figzał <dariuszfigzal@gmail.com> Link: https://patch.msgid.link/20260610164942.74956-1-dariuszfigzal@gmail.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2026-06-11dt-bindings: pinctrl: sun55i-a523: increase IRQ banks numberAndre Przywara1-4/+4
The Allwinner A523 SoC implements 10 GPIO banks in the first pinctrl instance, but it skips the first bank (PortA), so their index goes from 1 to 10. The same is actually true for the IRQ banks: there are registers for 11 banks, though the first bank is not implemented (RAZ/WI). In contrast to previous SoCs, the count of the IRQ banks starts with this first unimplemented bank, so we need to provide an interrupt for it. And indeed the A523 user manual lists an interrupt number for PortA, so we need to increase the maximum number of interrupts per pin controller to 11, to be able to assign the correct interrupt number for each bank. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by: Chen-Yu Tsai <wens@kernel.org> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-06-11dt-bindings: phy: qcom,qmp-usb: Add ipq5210 USB3 PHYVaradarajan Narayanan1-20/+26
Add dt-bindings for the USB3 QMP PHY found on the Qualcomm IPQ5210 SoC. The IPQ5210 PHY is compatible with the IPQ9574 PHY, so add it as a fallback- compatible entry using a oneOf construct rather than a plain enum entry. Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260608103344.2740174-3-varadarajan.narayanan@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-06-11dt-bindings: phy: qcom,qusb2: Document IPQ5210 compatibleVaradarajan Narayanan1-0/+4
Document the QUSB2 PHY compatible for the IPQ5210 SoC. The IPQ5210 PHY is compatible with the IPQ6018 QUSB2 PHY, so allow it to use qcom,ipq6018-qusb2-phy as the fallback compatible. Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260608103344.2740174-2-varadarajan.narayanan@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-06-11dt-bindings: phy: lynx-10g: initial documentVladimir Oltean1-0/+139
Add a schema for the 10G Lynx SerDes. This is very similar to the modern form of the 28G Lynx SerDes, which is very much the intention. There is intentionally no generic fsl,lynx-10g compatible string due to the hardware inability to report its capabilities, despite having a common register map. We allow both forms of #phy-cells = <1> in the top-level provider and #phy-cells = <0> in the per-lane provider for more flexibility to consumers, and because the kernel code is shared with the 28G Lynx which already has that support for compatibility reasons. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20260610151952.2141019-15-vladimir.oltean@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-06-11dt-bindings: PCI: mediatek: Add support for EcoNet EN7528Caleb James DeLisle1-0/+26
Introduce EcoNet EN7528 SoC compatible in MediaTek PCIe controller binding. EcoNet PCIe controller has the same configuration model as Mediatek v2 but is initialized more similarly to an MT7621 PCIe. Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20260521171951.1495781-3-cjd@cjdns.fr
2026-06-11dt-bindings: phy: sc8280xp-qmp-pcie: Document Eliza PCIe phyKrishna Chaitanya Chundru1-0/+6
Add compatibles for the Eliza PCIe QMP PHY's, which supports Gen3x1 and Gen3x2 configurations. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> Acked-by: Manivannan Sadhasivam <mani@kernel.org> Link: https://patch.msgid.link/20260608-eliza-v3-1-9bdeb7434b28@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-06-11dt-bindings: phy: sc8280xp-qmp-pcie: Disallow bifurcation register on PurwaKonrad Dybcio1-2/+11
Neither of the two Gen4x4 PHYs found on Purwa supports bifurcation. The PHY is however physically laid out as if it were to, since there are two separate ports (A/B). Split out a new if-then block to un-require the bifurcation register handle to squash this warning: purwa-iot-evk.dtb: phy@1bd4000 (qcom,x1p42100-qmp-gen4x4-pcie-phy): 'qcom,4ln-config-sel' is a required property Fixes: 2e1ffd4c1805 ("dt-bindings: phy: qcom,qmp-pcie: Add X1P42100 PCIe Gen4x4 PHY") Reported-by: Rob Herring <robh@kernel.org> Closes: https://lore.kernel.org/linux-arm-msm/176857775469.1631885.16133311938753588148.robh@kernel.org/ Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20260610-topic-purwa_phy_shutup_warning-v2-1-951c1fbfe9b2@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-06-11dt-bindings: dma: snps,dw-axi-dmac: Add fallback compatible for CV1800BInochi Amaoto1-2/+3
The previous version of the binding change only add compatible string without adding the fallback compatible, this breaks backward compatibility. Add the needed fallback compatible to fix this. Fixes: be3e2a0419c6 ("dt-bindings: dma: snps,dw-axi-dmac: Add CV1800B compatible") Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20260511063818.463877-2-inochiama@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-06-11dt-bindings: dma: qcom,gpi: Document GPI DMA engine for Shikra SoCXueyao An1-0/+1
Document the GPI DMA engine on Shikra platform. It is fully compatible with the GPI DMA engine found on SM6350, thus using qcom,sm6350-gpi-dma as fallback compatible. Signed-off-by: Xueyao An <xueyao.an@oss.qualcomm.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Komal Bajaj <komal.bajaj@oss.qualcomm.com> Link: https://patch.msgid.link/20260608-shikra-dt-m1-v4-1-2114300594a6@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-06-11dt-bindings: dma: fsl-edma: add dma-channel-mask property descriptionJoy Zou1-0/+9
Add documentation for the dma-channel-mask property in the fsl-edma binding. This property uses an inverted bit definition: bit value 0 indicates the channel is available, while bit value 1 indicates unavailable. That was already used widely for i.MX8, i.MX9. Correcting the definition will break backward compatibility. This reversal only impacts the eDMA dts node and driver, and doesn't impact DMA consumer. Therefore, keep the inverted definition. Also add a note at the top of the binding to highlight this inverted definition to prevent confusion. Signed-off-by: Joy Zou <joy.zou@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20260211-b4-imx95-v2x-v4-1-10852754b267@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-06-10perf test cs-etm: Remove unused Coresight workloadsJames Clark1-74/+2
These are now unused and had various issues like not working with out of source builds and being slow to compile. Delete them. Signed-off-by: James Clark <james.clark@linaro.org> Tested-by: Leo Yan <leo.yan@arm.com> Cc: Amir Ayupov <aaupov@meta.com> Cc: Ian Rogers <irogers@google.com> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Jonathan Corbet <corbet@lwn.net> Cc: Mike Leach <mike.leach@arm.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Paschalis Mpeis <Paschalis.Mpeis@arm.com> Cc: Shuah Khan <skhan@linuxfoundation.org> Cc: Suzuki Poulouse <suzuki.poulose@arm.com> Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2026-06-10Merge tag 'imx-dt64-7.2' of ↵Arnd Bergmann1-0/+37
git://git.kernel.org/pub/scm/linux/kernel/git/frank.li/linux into soc/dt i.MX dt64 changes for v7.2 New Board Support: Added 15+ new boards including i.MX95 (FRDM PRO, Aquila, Audio Board v2), i.MX93/91 (Variscite DART/VAR-SOM), i.MX8 (TQMa8QM, SolidRun i.MX8DXL HummingBoard), Toradex Verdin Zinnia variants, and LX2160A Half Twins. PCIe Improvements: Added Root Port nodes and PERST properties across iMX8MM/MP/MQ/DXL/QM/QXP/95, new PCIe support for iMX94/943, common M.2 PCIe overlay, fixed outbound address space configuration Graphics, Camera and Display: Mali G310 GPU for iMX952, HDMI for iMX8MP PhyBoard, extensive DH Electronics panel overlays, Extensive overlay ecosystem for DH Electronics iMX8MP boards, PhyBoard PEB-AV-18, camera (OV5640), and ethernet configuration overlays Peripheral Support: S32G2/G3 PIT/ADC/PWM, iMX8ULP CSI/ISI, iMX943 SD WiFi, USB hub for LX2160A, TPM/CAN/ADC support for Variscite boards, Bluetooth and UART enhancements for Toradex SMARC boards. Enhancements Added gpio-line-namesacross PhyBOARD platforms. Watchdog reset pinctrl configurations for iMX91 boards, Ethernet PHY reset GPIO support. Bug Fixes: Corrected DDR PMU interrupts, SMMU registers, watchdog addresses, interrupt flags, GPIO configurations, PHY reset handling, and RS485 polarity, USDHC signal configurations for PhyCORE SoMs. * tag 'imx-dt64-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/frank.li/linux: (110 commits) arm64: dts: imx{91,93}-phyboard-segin: Add peb-av-18 overlays arm64: dts: imx93-var-som-symphony: enable ADC arm64: dts: imx93-var-som-symphony: enable TPM3 PWM arm64: dts: imx93-var-som-symphony: keep RGB_SEL low arm64: dts: imx93-var-som-symphony: enable UART7 arm64: dts: imx93-var-som-symphony: add TPM support arm64: dts: imx91-var-som-symphony: fix RGB_SEL handling arm64: dts: freescale: fsl-ls1028a-tqmls1028a-mbls1028a: switch mmc aliases arm64: dts: imx943-evk-sdwifi: add a new dtso to support SDIW612 WiFi arm64: dts: imx8mp-kontron: Fix GPIO for display power switch arm64: dts: freescale: imx95-aquila: Add Clover carrier board arm64: dts: freescale: add Aquila iMX95 support dt-bindings: arm: fsl: add Aquila iMX95 arm64: dts: tqma8mpql-mba8mpxl: configure sai clock in audio codec as well arm64: dts: freescale: add i.MX95 19x19 FRDM PRO board dts dt-bindings: arm: fsl: Add i.MX95 19x19 FRDM PRO board arm64: dts: s32g: add PWM support for s32g2 and s32g3 arm64: dts: s32g3: Fix SWT8 watchdog address arm64: dts: imx95-var-dart-sonata: add CAN controller arm64: dts: imx95-var-dart-sonata: add TPM reset GPIO ... Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-06-10dt-bindings: interrupt-controller: renesas,r9a09g077-icu: Fix reg size in ↵Geert Uytterhoeven1-1/+1
example According to Figure 5.1 ("Unified memory map"), the safety register block is 64 KiB large, just like the non-safety register block. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/364ff570c8a1845fab24bd89557f06c9e406f8de.1781105007.git.geert+renesas@glider.be Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-06-10hwmon: temperature: add support for EMC1812Marius Cristea2-0/+68
This is the hwmon driver for Microchip EMC1812/13/14/15/33 Multichannel Low-Voltage Remote Diode Sensor Family. EMC1812 has one external remote temperature monitoring channel. EMC1813 has two external remote temperature monitoring channels. EMC1814 has three external remote temperature monitoring channels, channels 2 and 3 support anti parallel diode. EMC1815 has four external remote temperature monitoring channels and channels 1/2 and 3/4 support anti parallel diode. EMC1833 has two external remote temperature monitoring channels and channels 1 and 2 support anti parallel diode. Resistance Error Correction is supported on channels 1/2 and 3/4. Signed-off-by: Marius Cristea <marius.cristea@microchip.com> Link: https://lore.kernel.org/r/20260610-hw_mon-emc1812-v11-2-cef809af5c19@microchip.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2026-06-10dt-bindings: hwmon: temperature: add support for EMC1812Marius Cristea1-0/+193
This is the devicetree schema for Microchip EMC1812/13/14/15/33 Multichannel Low-Voltage Remote Diode Sensor Family. It also updates the MAINTAINERS file to include the new driver. EMC1812 has one external remote temperature monitoring channel. EMC1813 has two external remote temperature monitoring channels. EMC1814 has three external remote temperature monitoring channels and channels 2 and 3 support anti parallel diode. EMC1815 has four external remote temperature monitoring channels and channels 1/2 and 3/4 support anti parallel diode. EMC1833 has two external remote temperature monitoring channels and channels 1 and 2 support anti parallel diode. Resistance Error Correction is supported on channels 1/2 and 3/4. Signed-off-by: Marius Cristea <marius.cristea@microchip.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20260610-hw_mon-emc1812-v11-1-cef809af5c19@microchip.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2026-06-10dt-bindings: nvmem: consumer: Make 'nvmem' an array of one-item entriesKonrad Dybcio1-0/+2
'nvmem' unlike 'nvmem-cells', consumes references to just a single phandle with no arguments (i.e. with 0 cells). Constrain the schema to enforce that, so that the number of such single-item entries can then be regulated by IP block-specific YAMLs. Suggested-by: Rob Herring <robh@kernel.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://patch.msgid.link/20260610-topic-nvmem_schema_warning_fix-v1-1-4029becf13f9@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-06-10dt-bindings: wire style checker into dt_binding_checkDaniel Golle1-2/+17
Run dt-check-style as part of dt_binding_check_one. The recipe wraps the tool with scripts/jobserver-exec so worker count follows the GNU make jobserver -- `make -j N dt_binding_check` constrains the checker to N workers rather than spawning one per CPU. Default mode (relaxed) is zero-violation on the current tree, so this does not introduce new warnings into make dt_binding_check. Stricter rules are available via --mode=strict (eg. for use by checkpatch.pl in a future series). Signed-off-by: Daniel Golle <daniel@makrotopia.org> Link: https://patch.msgid.link/a14fdbded0acdc4fef1c1278100f2f4c6a93a488.1779908995.git.daniel@makrotopia.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-06-10dt-bindings: media: mt9m114: document common video device propertiesSvyatoslav Ryhel1-1/+4
Document common video interface device properties, such as rotation and orientation. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://patch.msgid.link/20260531092924.12929-2-clamor95@gmail.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-06-10Merge tag 'wireless-next-2026-06-10' of ↵Jakub Kicinski1-0/+24
https://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless-next Johannes Berg says: ==================== Quite a few last updates, notably: - b43: new support for an 11n device - mt76: - mt792x broken usb transport detection - mt7921 regd improvements - mt7927 support - iwlwifi: - more kunit tests - FW version updates - ath12k: WDS support - rtw89: - RTL8922AU support - USB 3 mode switch for performance - better monitor radiotap support - RTL8922DE preparations - cfg80211/mac80211: - update UHR to D1.4, UHR DBE support - finally remove 5/10 MHz support - S1G rate reporting - multicast encapsulation offload * tag 'wireless-next-2026-06-10' of https://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless-next: (285 commits) b43: add RF power offset for N-PHY r8 + radio 2057 r8 b43: add channel info table for N-PHY r8 + radio 2057 r8 b43: add IPA TX gain table for N-PHY r8 + radio 2057 r8 b43: support radio 2057 rev 8 b43: route d11 corerev 22 to 24-bit indirect radio access b43: add d11 core revision 0x16 to id table b43: add firmware mappings for rev22 rfkill: Replace strcpy() with memcpy() wifi: brcmfmac: flowring: simplify flow allocation wifi: brcm80211: change current_bss to value wifi: ath12k: enable IEEE80211_VHT_EXT_NSS_BW_CAPABLE when NSS ratio is reported wifi: ath12k: fix EAPOL TX failure caused by stale tcl_metadata bits wifi: ath: Update copyright in testmode_i.h wifi: ath10k: Update Qualcomm copyrights wifi: ath11k: Update Qualcomm copyrights wifi: ath12k: Update Qualcomm copyrights wifi: mt76: Drop unneeded mt76_register_debugfs_fops() return checks wifi: mt76: mt7921: assert sniffer on chanctx change wifi: mt76: mt7996: fix potential tx_retries underflow wifi: mt76: mt7925: fix potential tx_retries underflow ... ==================== Link: https://patch.msgid.link/20260610103637.179340-3-johannes@sipsolutions.net Signed-off-by: Jakub Kicinski <kuba@kernel.org>
generated by cgit (git 2.54.0.dirty) at 2026-09-29 00:29:47 +0000