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2026-07-17PCI: switchtec: Add Microchip PCI1008 to NTB DMA alias quirkLogan Gunthorpe1-0/+1
Add the PCI1008 device ID to the quirk_switchtec_ntb_dma_alias PCI fixup table. Without it, DMA transactions from a PCI1008 switch's NTB function are not given the correct requester ID alias, which can misdirect them under an IOMMU. Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Link: https://patch.msgid.link/20260714212010.230606-4-logang@deltatee.com
2026-07-17PCI: switchtec: Add Microchip PCI1008 device IDLogan Gunthorpe1-0/+1
Add the Microchip PCI1008 device ID to the core switchtec management driver's PCI ID table. Without it, the management endpoint on a PCI1008 switch is not bound by this driver, preventing userspace tools from configuring or monitoring the switch and leaving NTB functionality unavailable. Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Link: https://patch.msgid.link/20260714212010.230606-3-logang@deltatee.com
2026-07-17dmaengine: switchtec-dma: Add PCI1008 device IDLogan Gunthorpe1-0/+1
Add the PCI1008 device ID for switchtec-dma. Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Vinod Koul <vkoul@kernel.org> Link: https://patch.msgid.link/20260714212010.230606-2-logang@deltatee.com
2026-07-17Merge tag 'mtd/fixes-for-7.2-rc4' of ↵Linus Torvalds17-23/+224
git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux Pull mtd fixes from Miquel Raynal: "Among the most important fixes that we have here, there are: - the revert of the uclinux map driver which was presumed to be no longer used but in fact was - the use of SPI match data to get chip capabilities in the mchp23k256 driver - several fixes addressing the newly introduced virt-concat support - a missing build dependency on ndfc as well as the usual load (if not actually bigger than usual) of uninitialized variables, leaks, double free, and AI fuzzed issues being fixed" * tag 'mtd/fixes-for-7.2-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: Revert "mtd: maps: remove uclinux map driver" mtd: onenand: samsung: report DMA completion timeouts mtd: rawnand: fsl_ifc: return errors for failed page reads mtd: mchp23k256: use SPI match data for chip caps mtd: rawnand: lpc32xx_slc: fail DMA transfer on completion timeout mtd: rawnand: lpc32xx_mlc: fail DMA transfers on timeout mtd: fix double free and WARN_ON in add_mtd_device() error paths mtd: virt-concat: free duplicate generated name mtd: nand: mtk-ecc: stop on ECC idle timeouts mtd: mtdswap: remove debugfs stats file on teardown mtd: mtdpart: validate partition bounds in mtd_add_partition() mtd: mtdpart: fix uninitialized erasesize on MTDPART_OFS_RETAIN error path mtd: rawnand: ndfc: add CONFIG_OF dependency mtd: spinand: initialize ret in regular page reads mtd: virt_concat: fix use-after-free in mtd_virt_concat_destroy() mtd: rawnand: ingenic: handle ECC clock enable failures mtd: nand: ecc-mtk: handle ECC clock enable failures mtd: virt_concat: fix use-after-free in mtd_virt_concat_destroy_joins() mtd: rawnand: ndfc: fix gcc uninitialized var
2026-07-17Merge tag 'mmc-v7.2-rc2' of ↵Linus Torvalds7-60/+135
git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc Pull MMC fixes from Ulf Hansson: "MMC core: - Fix RPMB device unregister ordering - Fix __counted_by handling in mmc_test MMC host: - mtk-sd: Document missing clocks for MT8189 - sdhci-esdhc-imx: Fix the support for system suspend/resume for SDIO - sdhci-of-dwcmshc: Fix error handling for clock prepare/enable - vub300: - Fix lockdep issue for the cmd_mutex - Fix use-after-free on probe failure MEMSTICK: - Reject a card that reports too many blocks" * tag 'mmc-v7.2-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: mmc: sdhci-esdhc-imx: fix resume error handling mmc: sdhci-esdhc-imx: make non-fatal errors non-blocking in suspend mmc: sdhci-esdhc-imx: use pm_runtime_resume_and_get() in suspend mmc: sdhci-esdhc-imx: disable irq during suspend to fix unhandled interrupt mmc: sdhci-esdhc-imx: restore pinctrl before restoring ios timing on resume mmc: sdhci-esdhc-imx: fix esdhc_change_pinstate() to allow default state restore mmc: sdhci-esdhc-imx: restore DLL override for DDR modes on resume mmc: sdhci-esdhc-imx: remove unnecessary mmc_card_wake_sdio_irq check for tuning save/restore mmc: block: fix RPMB device unregister ordering memstick: ms_block: reject a card that reports too many blocks dt-bindings: mmc: mtk-sd: Document extra clocks for MT8189 mmc: vub300: defer reset until cmd_mutex is unlocked mmc: vub300: fix use-after-free on probe failure mmc: mmc_test: Fix __counted_by handling after kzalloc_flex() conversion mmc: sdhci-of-dwcmshc: check bus clock enable result in the probe() method
2026-07-17Revert "arm64: syscall: Ensure saved x0 is kept in-sync with tracer updates"Will Deacon1-29/+0
This reverts commit e057b94772328221405b067c3a85fe479b915dc8. Sashiko points out that updating 'orig_x0' after secure_computing() has returned is too late to handle the case where a seccomp filter is re-evaluated after initially returning SECCOMP_RET_TRACE. This means that a tracer can manipulate the first argument of the syscall behind seccomp's back. For now, revert the initial fix and we'll have another crack at it soon. Since the incorrect fix was cc'd to stable, do the same here with an appropriate fixes tag. Cc: stable@vger.kernel.org Fixes: e057b9477232 ("arm64: syscall: Ensure saved x0 is kept in-sync with tracer updates") Link: https://sashiko.dev/#/patchset/20260716120640.6590-1-will@kernel.org Signed-off-by: Will Deacon <will@kernel.org>
2026-07-17drm/ttm/pool: back up at native page orderMatthew Brost4-62/+170
ttm_pool_split_for_swap() unconditionally splits high-order pool pages into order-0 pages before backup, so every compound the shrinker touches is shattered even when the rest of the system would prefer it stay intact. Under sustained kswapd pressure this fragments memory enough to drive other parts of MM into recovery loops. Back up each compound at its native order instead. In ttm_pool_backup(), hand the full compound to the new ttm_backup_backup_folio(), which backs up subpages to a contiguous range of shmem indices and returns the base handle plus the number of subpages actually backed up (@nr_backed). On full success, free the compound once at its native order -- no split_page(), no per-4K refcount juggling. A per-folio backup can't be made fully atomic under memory pressure: ttm_backup_backup_folio() must allocate shmem folios before source subpages can be released, so under true OOM any subpage may fail while the rest of the compound is still live. Two mechanisms handle this without regressing reclaim behaviour: - alloc_gfp gets __GFP_NOMEMALLOC whenever order > 0 (cleared again for order-0), so a high-order backup fails fast with -ENOMEM instead of draining kernel reserves, leaving them for other allocations under the same pressure. - If ttm_backup_backup_folio() still returns a short @nr_backed with a valid handle for the successfully-backed prefix, split the source compound with ttm_pool_split_for_swap(), free the prefix as order-0 pages (already safely in shmem), and retry the remaining subpages at order 0, where __GFP_NOMEMALLOC is cleared and reserves may be used as a last resort. This preserves the original split-on-OOM fallback while keeping the common case fragmentation-free, and preserves the "partial backup is allowed" contract (shrunken is incremented per subpage backed up). The restore-side leftover-page split in ttm_pool_restore_commit() is left as-is: it's unreachable in practice and not worth complicating the restore state machine to avoid. Testing: the existing backup_fault_inject point only truncated tt->num_pages, which never exercised the reactive split path above since it never left a compound partially backed up. Wire fault injection into ttm_backup_backup_folio() itself: past the first subpage of a compound, synthesize a -ENOMEM in place of shmem_read_folio_gfp() when should_fail() trips, producing the same short @nr_pages_backed a real failure would and forcing ttm_pool_backup() through the split-and-retry path. The fault_attr stays private to ttm_pool.c; ttm_backup.c reaches it through ttm_backup_fault_inject_folio(), declared in ttm_pool_internal.h. While converting the writeback branch to operate on the whole folio, the unlock condition after shmem_writeout() also changed from `if (ret)` to `if (ret == AOP_WRITEPAGE_ACTIVATE)`, matching the actual contract: shmem_writeout()/swap_writeout() only leave the folio locked when returning AOP_WRITEPAGE_ACTIVATE; any other return (including a hard error from arch_prepare_to_swap()) means the folio was already unlocked internally. The old `if (ret)` check would have double- unlocked in that hard-error case. Cc: Christian Koenig <christian.koenig@amd.com> Cc: Huang Rui <ray.huang@amd.com> Cc: Matthew Auld <matthew.auld@intel.com> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Maxime Ripard <mripard@kernel.org> Cc: Thomas Zimmermann <tzimmermann@suse.de> Cc: David Airlie <airlied@gmail.com> Cc: Simona Vetter <simona@ffwll.ch> Cc: dri-devel@lists.freedesktop.org Cc: linux-kernel@vger.kernel.org Cc: stable@vger.kernel.org Fixes: b63d715b8090 ("drm/ttm/pool, drm/ttm/tt: Provide a helper to shrink pages") Suggested-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> Assisted-by: Claude:claude-opus-4.6 Signed-off-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> Link: https://patch.msgid.link/20260716201358.4086085-1-matthew.brost@intel.com
2026-07-17USB: phy: fsl-usb: fix missing static keywordsJohan Hovold2-29/+29
A recent change enabling compile testing of a Freescale dual-role controller indirectly enabled a USB PHY driver to be built. That driver in turn is missing a bunch of static keywords which results in warnings like: drivers/usb/phy/phy-fsl-usb.c:105:5: error: no previous prototype for 'write_ulpi' [-Werror=missing-prototypes] 105 | int write_ulpi(u8 addr, u8 data) | ^~~~~~~~~~ which consequently breaks -Werror builds. Add the missing static keywords. Fixes: 0807c500a1a6 ("USB: add Freescale USB OTG Transceiver driver") Cc: stable@vger.kernel.org # 3.0 Reported-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/4f9f5ff9-8eaa-4bd5-9331-37119f78e13f@sirena.org.uk Signed-off-by: Johan Hovold <johan@kernel.org> Link: https://patch.msgid.link/20260717154957.1853976-1-johan@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-07-17Merge tag 'soc-fixes-7.2-1' of ↵Linus Torvalds18-50/+113
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull SoC fixes from Arnd Bergmann: "There are only three devicetree fixes this time: one critical memory corruption fix for Renesas and three minor corrections for Tegra. The MAINTAINERS file is updated for a new maintainer of the CIX platform and two address changes. The rest is all driver fixes, mostly firmware: - multiple runtime issues in ARM SCMI and FF-A firmware code, dealing with error handling for corner cases in firmware. - multiple fixes for reset drivers, dealing with individual platform specific mistakes and more error handling - minor build and runtime fixes for the Tegra SoC drivers" * tag 'soc-fixes-7.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: arm64: dts: renesas: ironhide: Describe inline ECC carveouts MAINTAINERS: Update maintainer and git tree for CIX SoC ARM: Don't let ARMv5 platforms select USE_OF MAINTAINERS: Update SpacemiT SoC git tree repository firmware: arm_scmi: Rate-limit queue-full warnings in IRQ context firmware: arm_scmi: Use 64-bit division for clock rate rounding reset: imx7: Correct polarity of MIPI CSI resets on i.MX8MQ reset: sunxi: fix memory region leak on ioremap failure dt-bindings: reset: altr: add COMBOPHY_RESET for Agilex5 reset: spacemit: k3: fix USB2 ahb reset firmware: arm_scmi: Grammar s/may needed/may be needed/ firmware: arm_ffa: Fix NULL dereference in ffa_partition_info_get() firmware: arm_ffa: Respect firmware advertised RX/TX buffer size limits arm64: tegra: Fix CPU1 node unit-address on Tegra264 arm64: tegra: Fix CPU compatible string to cortex-a78ae on Tegra234 MAINTAINERS: .mailmap: update Jens Wiklander's email address soc/tegra: fuse: Fix spurious straps warning on SMCCC platforms soc/tegra: pmc: fix #ifdef block in header drm/tegra: Fix a strange error handling path arm64: tegra: Remove fallback compatible for GPCDMA
2026-07-17mtd: part: reject MTDPART_OFS_RETAIN in mtd_add_partition()zhouminqiang1-1/+2
mtd_add_partition() does not reject the special offset value MTDPART_OFS_RETAIN (-3), which leads to a WARN_ON in add_mtd_device() when called through the BLKPG ioctl on NAND devices. The RETAIN value depends on cur_offset being the end of the previous partition, but in the dynamic partition path cur_offset equals the offset argument itself, causing undefined behavior. Commit 5daa7b21496a ("mtd: prepare partition add and del functions for ioctl requests") introduced mtd_add_partition() and correctly rejected MTDPART_OFS_APPEND (-1) and MTDPART_OFS_NXTBLK (-2), since those special offsets rely on cur_offset tracking the previous partition's end. However, commit 1a31368bf92e ("mtd: add a flags for partitions which should just leave smth. after them") later added MTDPART_OFS_RETAIN (-3) for the static partition table path without updating mtd_add_partition() to also reject this value. With offset=-3 passed via BLKPG, the RETAIN size calculation in allocate_partition() underflows (parent_size - 0xFFFFFFFFFFFFFFFD = parent_size + 3). If the underflow result does not appear to leave enough space, allocate_partition() jumps to out_register via goto, skipping erasesize initialization. This results in erasesize=0, which triggers: WARN_ON((!mtd->erasesize || !master->_erase) && !(mtd->flags & MTD_NO_ERASE)) in add_mtd_device(). If the underflow result appears to leave enough space, a bogus partition size is calculated, but the "out of reach" sanity check catches the invalid offset and creates a disabled empty partition (offset=0, size=0) instead of returning an error. Fix this by adding MTDPART_OFS_RETAIN to the rejection list in mtd_add_partition(), consistent with the existing handling of APPEND and NXTBLK. Fixes: 1a31368bf92e ("mtd: add a flags for partitions which should just leave smth. after them") Signed-off-by: zhouminqiang <zhouminqiang2@huawei.com> Reviewed-by: Zhihao Cheng <chengzhihao1@huawei.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2026-07-17mtd: mpc5121_nfc: use platform for irq and ioremapRosen Penev1-27/+12
Replace the open-coded of_address_to_resource() plus devm_request_mem_region() and devm_ioremap() sequence with a single devm_platform_ioremap_resource() call, which folds the resource lookup, region reservation and mapping into one step and returns an ERR_PTR on failure, checked with IS_ERR() and propagated via PTR_ERR(). Switch IRQ acquisition from irq_of_parse_and_map() to platform_get_irq(), which only retrieves the interrupt the OF/platform core has already set up rather than transferring mapping ownership to the driver. Drop the now unneeded of_irq.h include. This is behaviorally equivalent: the driver already reserved the region with devm_request_mem_region(), so the non-overlapping reg requirement of devm_platform_ioremap_resource() was already satisfied. Drop the now-unused regs_paddr / regs_size locals, which previously only fed the open-coded request/ioremap calls. Keep the linux/of_address.h include, as of_iomap() is still used elsewhere in the driver. Built for PowerPC (mpc512x_defconfig + CONFIG_MTD_NAND_MPC5121_NFC) with LLVM=1; drivers/mtd/nand/raw/mpc5121_nfc.o compiles cleanly. Assisted-by: opencode:hy3-free Signed-off-by: Rosen Penev <rosenp@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2026-07-17mtd: mtdoops: free page bitmap when the backing MTD is removedXu Rao1-0/+3
mtdoops_notify_add() allocates oops_page_used when the configured MTD device is registered. mtdoops_notify_remove() detaches from that device but leaves the bitmap allocated. If the same MTD device is later registered again, the add path allocates a new bitmap and overwrites the old pointer, leaking one vmalloc allocation per remove/add cycle. This is only visible when the backing MTD device can disappear and be registered again while mtdoops remains loaded, so the usual static MTD case does not expose it. Free the bitmap after unregistering the dumper and flushing the pending workers, then clear the pointer and page count before a later attach can allocate fresh state. Clearing the pointer also keeps the module exit path from freeing the same bitmap a second time after a remove event. Fixes: be95745f0167 ("mtd: mtdoops: keep track of used/unused pages in an array") Cc: stable@vger.kernel.org Signed-off-by: Xu Rao <raoxu@uniontech.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2026-07-17mtd: mtdswap: Avoid freeing registered blktrans device twiceRuoyu Wang1-0/+1
In mtdswap_add_mtd(), debugfs setup failure after successful blktrans registration can free mbd_dev twice. add_mtd_blktrans_dev() initializes the blktrans device reference and publishes the disk. Once that succeeds, del_mtd_blktrans_dev() tears the disk down and drops the blktrans reference; when that reference reaches zero, blktrans_dev_release() frees the mtd_blktrans_dev. The debugfs failure path called del_mtd_blktrans_dev(mbd_dev), then fell through the common cleanup label and called kfree(mbd_dev) again. Clear the local pointer after deregistration so the common cleanup can still release the mtdswap state without freeing the blktrans object twice. This issue was found by a static analysis checker and confirmed by manual source review. Fixes: e8e3edb95ce6 ("mtd: create per-device and module-scope debugfs entries") Signed-off-by: Ruoyu Wang <ruoyuw560@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2026-07-17mtd: afs: validate v2 image info boundsPengpeng Hou1-0/+7
The AFS v2 parser uses footer[8] to locate the image information block inside the current erase block, then uses the image information region_count to walk entries from a fixed local array. The footer offset and region count come from flash contents and are not checked against the erase block or the local image-info array before use. Reject v2 entries whose image information offset would underflow the erase block calculation, and reject region counts that cannot fit in the local image-info array before walking region entries. Fixes: b7cf5e2830bb ("mtd: afs: add v2 partition parsing") Cc: stable@vger.kernel.org Signed-off-by: Pengpeng Hou <pengpeng@iscas.ac.cn> Acked-by: Linus Walleij <linusw@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2026-07-17mtd: intel-dg: Fix runtime PM error path in probeGuangshuo Li1-1/+1
intel_dg_mtd_probe() allocates region names before enabling runtime PM and before calling pm_runtime_resume_and_get(). If kasprintf() fails while building a region name, the error path jumps to err, which calls pm_runtime_put(). At that point there has not been a successful pm_runtime_resume_and_get() call to balance, so the runtime PM usage count can underflow. Jump to err_norpm from the kasprintf() failure path, as the runtime PM reference has not been acquired yet. Fixes: 779c59274d03 ("mtd: intel-dg: Fix accessing regions before setting nregions") Signed-off-by: Guangshuo Li <lgs201920130244@gmail.com> Reviewed-by: Raag Jadav <raag.jadav@intel.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2026-07-17mtd: nand-omap2: Move omap_nand_ids[] to raw nand driverUwe Kleine-König (The Capable Hub)3-9/+13
Defining a static array in a header results in each .c file that includes the header (here: drivers/memory/omap-gpmc.c and drivers/mtd/nand/raw/omap2.c) to contain a copy of that array when compiled to an object file. With sizeof(struct of_device_id[3]) ≥ 588 having omap_nand_ids[] twice just to do two string comparisons is quite some bloat. So move omap_nand_ids[] to the nand driver which actually needs that array for its module meta data and do the compatible check by hand. bloat-o-meter reports for drivers/memory/omap-gpmc.o (ARCH=arm): add/remove: 1/2 grow/shrink: 1/0 up/down: 28/-588 (-560) Function old new delta gpmc_probe_generic_child 2108 2136 +28 omap_nand_ids 588 - -588 Total: Before=18114, After=17554, chg -3.09% (drivers/mtd/nand/raw/omap2.o doesn't change). This allows to drop <linux/mod_devicetable.h> from include/linux/platform_data/mtd-nand-omap2.h (which is my original motivation for this change). Note that this header isn't needed in the two drivers because omap-gpmc.c doesn't use any device id struct and for the nand driver omap2.c of_device_id is already provided via <linux/platform_device.h>. Signed-off-by: Uwe Kleine-König (The Capable Hub) <u.kleine-koenig@baylibre.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2026-07-17mtd: rawnand: add Toshiba TC58NVG1S3HJames Hilliard2-1/+6
Without a full-ID entry, the non-ONFI TC58NVG1S3H falls back to the generic 0xda extended-ID decoding. It is therefore identified only as a generic 256 MiB Toshiba NAND. Without a model-specific interface configuration, the core leaves it in the conservative reset timing mode. Add its full five-byte ID with the datasheet geometry, OOB size and ECC requirements. Its interface timings match the mode-4-derived profile already used by the related TH58NVG2S3HBAI4 and TH58NVG3S0HBAI4, so share that profile and select it for the new model. Signed-off-by: James Hilliard <james.hilliard1@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2026-07-17mtd: nand: realtek-ecc: add missing MODULE_DEVICE_TABLE()Pengpeng Hou1-0/+1
The Realtek external ECC engine driver has an OF match table wired into its platform driver, but the table is not exported with MODULE_DEVICE_TABLE(). When the driver is built as a module, the missing OF module alias prevents automatic module loading from the compatible string. Add the missing MODULE_DEVICE_TABLE() entry. Fixes: 3148d0e5b1c5 ("mtd: nand: realtek-ecc: Add Realtek external ECC engine support") Cc: stable@vger.kernel.org Signed-off-by: Pengpeng Hou <pengpeng@iscas.ac.cn> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2026-07-17mtd: rawnand: qcom: Add MDM9607 compatibleStephan Gerhold1-0/+13
MDM9607 has QPIC v1.5 that supports the OP_PAGE_READ_ONFI_READ command, but is missing the rest of the hardware changes in QPIC v2. Add the new qcom,mdm9607-nand compatible and set it to use has_onfi_read_op without also setting qpic_version2. Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2026-07-17mtd: rawnand: qcom: Make has_onfi_read_op separate from qpic_version2Stephan Gerhold2-7/+10
QPIC v1.5 requires using the OP_PAGE_READ_ONFI_READ command, but is missing the rest of the hardware changes that are currently covered by the QPIC v2 (qpic_version2) check in the driver. Split that into an extra has_onfi_read_op feature flag so it can be separately enabled. No functional change. Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2026-07-17mtd: rawnand: qcom: Make "aon" clock optionalStephan Gerhold1-1/+1
Some SoCs (e.g. MDM9607, SDX55) have only a single separately controllable clock for the NAND controller. The actual clocks in the hardware are managed by the firmware and turned on all together when needed. In this case, there is no separate "aon" clock that can be described in the device tree from the OS point of view. Make the second "aon" clock optional to avoid an error when it is missing. For platforms that really need it, the dt-bindings are responsible for validating that. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2026-07-17dt-bindings: mtd: qcom,nandc: Add MDM9607 QPIC NAND controllerStephan Gerhold1-0/+25
Add the qcom,mdm9607-nand compatible for the QPIC NAND controller used inside the MDM9607 SoC. On MDM9607 and other recent SoCs, the QPIC hardware requires 3 clocks (core, aon, ahb). However, access to these clocks is restricted to the RPM firmware that controls the shared power resources for the whole SoC. The clocks cannot be controlled separately, for the OS view of the hardware there is only a single RPM_SMD_QPIC_CLK clock that implicitly enables all of the 3 clocks. The only exception to this are some IPQ* SoC that are not using RPM, there the clocks are directly controlled by the kernel via the clock controller (GCC). Require only one clock in the dt-bindings for MDM9607 to avoid having to define dummy clock entries. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2026-07-17ARM: dts: ls1021a-qds: add compatible string "fsl,ls1021aqds-fpga" for on ↵Frank Li1-3/+1
boards FPGA chip Add front compatible string "fsl,ls1021aqds-fpga" for on boards FPGA chip and remove unused property bank-width and device-width, which used for MTD devices and FPGA is not a MTD devices. Fix below CHECK_DTBS warning: rch/arm/boot/dts/nxp/ls/ls1021a-qds.dtb: memory-controller@1530000 (fsl,ifc): board-control@3,0: 'oneOf' conditional failed, one must be fixed: 'bank-width', 'device-width' do not match any of the regexes: '^gpio@[0-9a-f]+$', '^mdio-mux@[a-f0-9,]+$', '^pinctrl-[0-9]+$' /home/lizhi/source/linux-upstream-pci-ep-arm/arch/arm/boot/dts/nxp/ls/ls1021a-qds.dtb: memory-controller@1530000 (fsl,ifc): board-control@3,0:compatible: 'oneOf' conditional failed, one must be fixed: ['simple-mfd'] is too short arch/arm/boot/dts/nxp/ls/ls1021a-qds.dtb: memory-controller@1530000 (fsl,ifc): board-control@3,0: Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'bank-width', 'compatible', 'device-width', 'mdio-mux@54', 'ranges', 'reg' were unexpected) Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-17dt-bindings: fsl,fpga-qixis: Add fsl,ls1021aqds-fpga compatible stringFrank Li1-0/+1
Add fsl,ls1021aqds-fpga compatible string for ls1021a qds's FPGA on board controller chips, which connect CFI interface. With following patches to fix below CHECK_DTBS warnings: arch/arm/boot/dts/nxp/ls/ls1021a-qds.dtb: memory-controller@1530000 (fsl,ifc): board-control@3,0: 'oneOf' conditional failed, one must be fixed: 'bank-width', 'device-width' do not match any of the regexes: '^gpio@[0-9a-f]+$', '^mdio-mux@[a-f0-9,]+$', '^pinctrl-[0-9]+$' /home/lizhi/source/linux-upstream-pci-ep-arm/arch/arm/boot/dts/nxp/ls/ls1021a-qds.dtb: memory-controller@1530000 (fsl,ifc): board-control@3,0:compatible: 'oneOf' conditional failed, one must be fixed: ['simple-mfd'] is too short Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-17Merge tag 'powerpc-7.2-2' of ↵Linus Torvalds9-26/+24
git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux Pull powerpc fixes from Madhavan Srinivasan: - Enable CONFIG_VPA_PMU to be used with KVM - Initialize starttime at boot for native accounting - Set CPU_FTR_P11_PVR for Power11 and later processors - fix memory leak on krealloc failure in papr_init - Misc fixes and cleanups Thanks to Amit Machhiwal, Christophe Leroy (CS GROUP), Ethan Nelson-Moore, Gautam Menghani, Harsh Prateek Bora, Junrui Luo, Mukesh Kumar Chaurasiya (IBM), Ritesh Harjani (IBM), Rosen Penev, Shrikanth Hegde, Thorsten Blum, and Yuhao Jiang * tag 'powerpc-7.2-2' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: powerpc: Remove dead non-preemption code powerpc/dt_cpu_ftrs: Set CPU_FTR_P11_PVR for Power11 and later processors powerpc/pseries: fix memory leak on krealloc failure in papr_init powerpc/uaccess: correct check for CONFIG_PPC_E500 in mask_user_address() powerpc/vtime: Initialize starttime at boot for native accounting powerpc/85xx: Add fsl,ifc to common device ids powerpc/spufs: fix out-of-bounds access in spufs_mem_mmap_access() powerpc/pseries/Kconfig: Enable CONFIG_VPA_PMU to be used with KVM
2026-07-17soc: ti: knav_qmss: Remove debugfs file on teardownPengpeng Hou2-2/+6
knav_queue_probe() creates the global qmss debugfs file whose show callback reads the global knav_qdev state. knav_queue_remove() tears down the queue manager resources but leaves the debugfs file published. Save the debugfs dentry in struct knav_device and remove it during teardown before the resources used by the show callback are released. While touching the debugfs_create_file() call, spell the unchanged read- only file mode as 0444. Fixes: 41f93af900a2 ("soc: ti: add Keystone Navigator QMSS driver") Signed-off-by: Pengpeng Hou <pengpeng@iscas.ac.cn> Link: https://patch.msgid.link/20260706144706.96313-1-pengpeng@iscas.ac.cn Signed-off-by: Nishanth Menon <nm@ti.com>
2026-07-17arm64: dts: imx943-evk: Remove 'supports-clkreq' from PCIe1Richard Zhu1-1/+0
Remove the 'supports-clkreq' property from PCIe1 as the standard PCIe slot on i.MX943 EVK may not have CLKREQ# signal wired, causing compatibility issues with some PCIe cards. Fixes: 9a8f11f6f786 ("arm64: dts: imx943-evk: Add pcie[0,1] and pcie-ep[0,1] support") Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-17arm64: dts: imx91-9x9-qsb: add CAN support overlay fileHaibo Chen2-0/+50
On the i.MX91 9x9 QSB, CAN1 and MICFIL share pins. A TMUX1574RSVR analog mux controls the routing: when SEL is driven high, CAN1 is selected; when SEL is driven low, MICFIL is selected. By default, SEL is kept low. To enable CAN1, SEL must be driven high. This is done via the can_fun function defined in the pinctrl-gpiomux node. CAN1 uses the TJA1057GT/3 PHY. Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-17arm64: dts: imx8qm-var-som: Add support for Variscite Symphony boardStefano Radaelli2-0/+491
Add device tree support for the Variscite Symphony carrier board with the VAR-SOM-MX8 QuadMax system on module. The Symphony board includes - uSD Card support - USB ports and OTG - Additional Gigabit Ethernet interface - Uart, SPI and I2C interfaces - GPIO Expanders - RTC module - TPM module - CAN peripherals - PCIE support Link: https://variscite.com/carrier-boards/symphony-board/ Signed-off-by: Stefano Radaelli <stefano.r@variscite.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-17arm64: dts: freescale: Add support for Variscite VAR-SOM-MX8 QuadMaxStefano Radaelli1-0/+531
Add device tree support for the Variscite VAR-SOM-MX8 QuadMax system on module. This SOM is designed to be used with various carrier boards. The module includes: - NXP i.MX8 QuadMax MPU processor - Up to 8GB of LPDDR4 memory - Up to 128GB of eMMC storage memory - Integrated 10/100/1000 Mbps Ethernet Transceiver - Codec audio WM8904 - WIFI6 dual-band 802.11ax/ac/a/b/g/n with optional 802.15.4 and Bluetooth Only SOM-specific peripherals are enabled by default. Carrier board specific interfaces are left disabled to be enabled in the respective carrier board device trees. Link: https://variscite.com/system-on-module-som/i-mx-8/i-mx-8-quadmax-quadplus/var-som-mx8/ Signed-off-by: Stefano Radaelli <stefano.r@variscite.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-17dt-bindings: arm: fsl: add Variscite VAR-SOM-MX8 QuadMax BoardsStefano Radaelli1-0/+6
Add DT compatible strings for Variscite VAR-SOM-MX8 QuadMax SoM and Variscite Symphony development carrier Board. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Stefano Radaelli <stefano.r@variscite.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-17drm/appletbdrm: Allocate request/response buffers in begin_fb_accessThomas Zimmermann1-23/+30
In atomic_check, damage handling is not fully evaluated. Another atomic_check helper could trigger a full modeset and thus invalidate damage clips. Allocation of the request/response buffers in appletbdrm depends on correct damage information. Otherwise it might allocate incorrectly sized buffers. Allocate the buffers in the driver's begin_fb_access helper. It runs early during the commit when damage clipping has been fully evaluated. v5: - pass plane state as the old damage-iterator state v2: - allocate before drm_gem_begin_shadow_fb_access() to avoid leak on error Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Acked-by: Aditya Garg <gargaditya08@proton.me> Acked-by: Zack Rusin <zack.rusin@broadcom.com> Link: https://patch.msgid.link/20260610152505.260172-6-tzimmermann@suse.de
2026-07-17arm64: dts: imx8mn-var-som-symphony: Disable internal RTCStefano Radaelli1-0/+4
Disable the internal SNVS RTC on the Symphony carrier board and use the external DS1337 RTC instead. Signed-off-by: Stefano Radaelli <stefano.r@variscite.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-17arm64: dts: imx8mn-var-som-symphony: enable PWM1Stefano Radaelli1-0/+12
Enable PWM1 on the Symphony carrier board and add the corresponding pinctrl configuration. Signed-off-by: Stefano Radaelli <stefano.r@variscite.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-17arm64: dts: imx8mn-var-som-symphony: keep RGB_SEL lowStefano Radaelli1-0/+8
Keep the RGB_SEL line driven low on the Symphony carrier board. This avoids leaving the line floating and ensures the board remains in the expected display configuration. Signed-off-by: Stefano Radaelli <stefano.r@variscite.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-17arm64: dts: imx8mn-var-som-symphony: add wakeup sourcesStefano Radaelli1-0/+4
Mark the Symphony carrier board GPIO keys and capacitive touchscreen as wakeup sources. Signed-off-by: Stefano Radaelli <stefano.r@variscite.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-17arm64: dts: imx8mn-var-som-symphony: Enable I2C4Stefano Radaelli1-0/+24
Enable I2C4 on the Symphony carrier and add pinctrl configuration, including GPIO-based bus recovery support. Signed-off-by: Stefano Radaelli <stefano.r@variscite.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-17arm64: dts: imx8mn-var-som-symphony: Add TPM2 supportStefano Radaelli1-0/+14
Add support for the TPM2 device on the VAR-SOM Symphony carrier board. The ST33K TPM2 is connected over I2C, and A PCA6408 GPIO expander is used to control the reset signal required to release the TPM from reset. Add the PCA6408 GPIO expander and the ST33K TPM2 device node. Signed-off-by: Stefano Radaelli <stefano.r@variscite.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-17arm64: dts: freescale: imx8mn-var-som: enable FlexSPI interfaceStefano Radaelli1-0/+17
Enable the FlexSPI controller on the VAR-SOM-MX8MN and add the corresponding pin multiplexing configuration. Signed-off-by: Stefano Radaelli <stefano.r@variscite.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-17arm64: dts: freescale: imx8mn-var-som: drop duplicate USB OTG nodeStefano Radaelli1-6/+0
The VAR-SOM-MX8MN module does not provide an onboard USB connector. The complete USB OTG description, including the Type-C role switch configuration, is already provided by the Symphony carrier board device tree. Remove the duplicate USB OTG node from the SOM dtsi to avoid describing the same hardware in two places. Signed-off-by: Stefano Radaelli <stefano.r@variscite.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-17arm64: dts: freescale: imx8mn-var-som: Rework WiFi/BT and add legacy dtsStefano Radaelli7-8/+87
The VAR-SOM-MX8MN currently integrates the NXP IW61x wireless module, providing WiFi over SDIO and Bluetooth over UART. Move the wireless module configuration out of the base imx8mn-var-som.dtsi and provide dedicated variant includes. The IW61x configuration is moved to imx8mn-var-som-wifi-bt-iw61x.dtsi and used by the Symphony evaluation board device tree. A separate imx8mn-var-som-wifi-brcm-legacy.dtsi include is added to keep the configuration for the legacy Broadcom SDIO WiFi module used on earlier SOM revisions. To preserve compatibility with older SOM revisions, add a separate imx8mn-var-som-symphony-legacy.dtb, which disables the IW61x setup and applies the Broadcom-specific configuration. The Broadcom-based SOM revision is no longer in production, but support is kept for existing users. This keeps the VAR-SOM-MX8MN support aligned with the existing VAR-SOM-MX8MM implementation. Signed-off-by: Stefano Radaelli <stefano.r@variscite.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-17arm64: dts: freescale: imx8mn-var-som: Add MCP251xFD CAN controllerStefano Radaelli1-0/+27
Add support for the Microchip MCP251xFD CAN-FD controller connected to the SPI bus on the i.MX8MN VAR-SOM. The controller uses a 40 MHz external oscillator and requires an interrupt line and a dedicated RX interrupt GPIO. Add the fixed clock, the MCP251xFD device node with the required properties, and the corresponding pinctrl configuration. Signed-off-by: Stefano Radaelli <stefano.r@variscite.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-17arm64: dts: freescale: imx8mn-var-som: Add support for WM8904 audio codecStefano Radaelli1-3/+95
The VAR-SOM-MX8MN can integrate the WM8904, a high-performance ultra-low-power stereo codec optimized for portable audio applications. Add the WM8904 device to the appropriate I2C bus, enable the SAI peripheral, and introduce the sound node to expose the sound card to the system. Add I2C3 recovery gpio properties. Signed-off-by: Stefano Radaelli <stefano.r@variscite.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-17arm64: dts: freescale: imx8mn-var-som: Update FEC support with MaxLinear PHYStefano Radaelli2-10/+30
Update the FEC Ethernet controller on the i.MX8MN VAR-SOM to match the latest SOM hardware revision using the integrated MaxLinear MXL86110 PHY. Add the PHY VDDIO supply regulator and adjust reset timings. The PHY LED signals originate on the SOM, but the actual LEDs are part of the carrier implementation (RJ45 connector). Move the LED configuration to the Symphony carrier device tree, matching the evaluation board LED wiring. Wake-on-LAN via magic packet is not supported at the VAR-SOM level and is therefore not enabled in the SOM device tree nor in the official evaluation carrier board configuration (symphony). Designs requiring WoL support may enable it in their own carrier-specific device trees if properly integrated at the hardware level. Signed-off-by: Stefano Radaelli <stefano.r@variscite.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-17arm64: dts: freescale: imx8mn-var-som: Align fsl,pins tablesStefano Radaelli1-63/+63
Reformat the fsl,pins tables in the i.MX8MN VAR-SOM device tree to use consistent column alignment across all pinctrl groups. Align the entries to match the formatting already used in the pinctrl_fec1 group, which contains the longest pin definitions, for improved readability and consistency. No functional changes intended. Signed-off-by: Stefano Radaelli <stefano.r@variscite.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-17arm64: dts: freescale: imx8mn-var-som: move uSD support to carrier boardsStefano Radaelli3-58/+102
The VAR-SOM-MX8MN module does not provide an onboard SD card slot. USDHC2 is routed to the SD card slot on the carrier boards. Move the USDHC2 node and pinctrl configuration from the SOM device tree to imx8mn-var-som-symphony.dts and imx8mn-rve-gateway.dts, keeping the SOM dtsi limited to hardware present on the module itself. Add the required off-on-delay-us property for the USDHC2 regulator on the Symphony carrier board. Signed-off-by: Stefano Radaelli <stefano.r@variscite.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-17arm64: dts: freescale: imx8mn-var-som: Move UART4 description to SymphonyStefano Radaelli2-18/+18
The VAR-SOM-MX8MN module does not provide an onboard debug console. UART4 is routed and exposed only on the Symphony carrier board, while custom carrier designs may choose to expose a different UART. Move the UART4 node from the SOM device tree to the imx8mn-var-som-symphony.dts, keeping the SOM dtsi limited to hardware present on the module itself. Signed-off-by: Stefano Radaelli <stefano.r@variscite.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-07-17drm/i915/cdclk: Deal with 2 PPC hscale issues when calculating min CDCLKVille Syrjälä4-4/+88
Double the fractional part of the horizontal scale factor for the purposes of min_cdck calculation. This bumps the min CDCLK sufficiently to overcome some kind of 2 PPC granularity issue. Without this CDCLK may end up being too low and we get underruns with certain horizontal downscale factors. The current Bspec formula calls for doubling only the fractional part below 0.5, and rounding it down to a unit fraction. But that formula does not result in a sufficient CDCLK bump in a lot of cases. Empirical evidence supports doubling the entire fractional part, so let's just do that while we wait for further analysis from the hardware team. Also note that the position of the scaler output window also seems to matter. If the output is near the left edge of the screen then lower CDCLK is sufficient, but moving the output window further to the right causes underruns unless CDCLK is also bumped. Some prefill happening during hblank already? Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/20260715120926.10786-5-ville.syrjala@linux.intel.com Reviewed-by: Nemesa Garg <nemesa.garg@intel.com> Tested-by: Vidya Srinivas <vidya.srinivas@intel.com>
2026-07-17drm/i915/cdclk: Introduce crtc_state->pixel_rate_cdclkVille Syrjälä8-17/+28
We'll need to do additional adjustments to the pipe pixel rate for the purposes of min CDCLK calculations. Add a new crtc_state->pixel_rate_cdclk for that purpose. We'll leave the original crtc_state->pixel_rate for data rate related calculations since we presumably don't need those extra adjustments there. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/20260715120926.10786-4-ville.syrjala@linux.intel.com Reviewed-by: Nemesa Garg <nemesa.garg@intel.com>
2026-07-17drm/i915/cdclk: Introduce HAS_2PPC()Ville Syrjälä2-1/+2
We'll need to check for the "does the platform do 2 pixels per clock?" thing in a few places. Add a feature macro for it. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patch.msgid.link/20260715120926.10786-3-ville.syrjala@linux.intel.com Reviewed-by: Nemesa Garg <nemesa.garg@intel.com>