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2026-06-30dt-bindings: Drop incorrect usage of double '::'Krzysztof Kozlowski30-73/+73
There is no use of double colon '::' in YAML. OTOH, the literal style block, e.g. using '|' treats all characters as content [1] therefore single use of ':' in descriptions is perfectly fine, whenever '|' is used. Cleanup existing code, so the confusing style won't be re-used in new contributions. Link: https://yaml.org/spec/1.2.2/#literal-style [1] Acked-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Alim Akhtar <alim.akhtar@samsung.com> Acked-by: Sebastian Reichel <sebastian.reichel@collabora.com> Acked-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> # renesas Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Acked-by: Andi Shyti <andi.shyti@kernel.org> Link: https://patch.msgid.link/20260623054842.21831-4-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-06-30dt-bindings: clock: Drop incorrect usage of double '::'Krzysztof Kozlowski32-34/+34
There is no use of double colon '::' in YAML. OTOH, the literal style block, e.g. using '|' treats all characters as content [1] therefore single use of ':' in descriptions is perfectly fine, whenever '|' is used. Cleanup existing code, so the confusing style won't be re-used in new contributions. Link: https://yaml.org/spec/1.2.2/#literal-style [1] Acked-by: Alim Akhtar <alim.akhtar@samsung.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Acked-by: Andi Shyti <andi.shyti@kernel.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://patch.msgid.link/20260623054842.21831-3-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-06-30Merge drm/drm-next into drm-intel-nextJani Nikula790-7095/+26743
Sync with v7.2-rc1. Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2026-06-30dt-bindings: pinctrl: aspeed,ast2700-soc1: Add JTAGM1TRST groupBilly Tsai1-0/+1
The TRST signal of the JTAG master is optional and may not be wired on every design, but it is only selectable as part of the JTAGM1 group, which forces the D12 ball to be muxed whenever the JTAG master is used. Add a separate JTAGM1TRST group so boards can enable TRST independently of the other JTAG master signals. Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-06-30regulator: rtq2208: Remove the unnecessary MTP_SEL propertyMark Brown1-1/+3
ChiYuan Huang <cy_huang@richtek.com> says: This patch series remove the 'richtek,mtp-sel-high' property usage. Link: https://patch.msgid.link/cover.1782444299.git.cy_huang@richtek.com
2026-06-30regulator: dt-bindings: rtq2208: Label mtp-sel-high property as deprecatedChiYuan Huang1-1/+3
Since it can be identified by hardware register, label the unnecessary property 'richtek,mtp-sel-high' as deprecated. Signed-off-by: ChiYuan Huang <cy_huang@richtek.com> Link: https://patch.msgid.link/594ebe167b33ca885c040984624e4b5d1382c0e2.1782444299.git.cy_huang@richtek.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-06-30dmaengine: Add API to combine configuration and preparation (sg and single)Frank Li1-0/+9
Previously, configuration and preparation required two separate calls. This works well when configuration is done only once during initialization. However, in cases where the burst length or source/destination address must be adjusted for each transfer, calling two functions is verbose and requires additional locking to ensure both steps complete atomically. Add a new API dmaengine_prep_config_single() and dmaengine_prep_config_sg() and callback device_prep_config_sg() that combines configuration and preparation into a single operation. If the configuration argument is passed as NULL, fall back to the existing implementation. Tested-by: Niklas Cassel <cassel@kernel.org> Acked-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20260521-dma_prep_config-v7-1-1f73f4899883@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-06-30dt-bindings: PCI: qcom,pcie-ipq9574: Add IPQ5210 compatibleVaradarajan Narayanan1-0/+2
Add the IPQ5210 compatible using IPQ9574 as fallback. Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com> Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com> [mani: commit log] Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260610-ipq9650_pcie_binding-v2-2-69e27a1fbf1c@oss.qualcomm.com
2026-06-30dt-bindings: PCI: qcom,pcie-ipq9574: Add IPQ9650 compatibleKathiravan Thirumoorthy1-0/+13
Add the IPQ9650 PCIe compatible to the IPQ9574 binding, as the IPQ9650 controller is compatible with IPQ9574 and uses it as the fallback. While at it, make the global interrupt as required for IPQ9650. Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260610-ipq9650_pcie_binding-v2-1-69e27a1fbf1c@oss.qualcomm.com
2026-06-30dt-bindings: clock: renesas,versaclock7: Update maintainerBiju Das1-1/+1
Alex' email is bouncing. Update the maintainers list with my contact details to take over the schema maintenance. While at it, extend the entry in MAINTAINERS to the Versaclock 3 clock driver. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Brian Masney <bmasney@redhat.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20250905143441.7082-1-biju.das.jz@bp.renesas.com Link: https://patch.msgid.link/20260623162039.153291-1-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-06-30dt-bindings: clock: renesas: Add audio clock inputs for RZ/V2H familyJohn Madieu1-0/+6
RZ/V2H, RZ/V2N, and RZ/G3E support two optional external audio clock inputs (AUDIO_CLKB and AUDIO_CLKC) that can be used by the Audio Clock Generator (ADG) to derive internal audio clocks. The third ADG input (AUDIO_CLKA) is fed internally by the AUDIO_EXTAL pin and does not need a separate binding entry. Update the bindings to allow these optional clocks for all RZ/V2H family SoCs. Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20260525110603.4018170-2-john.madieu.xa@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-06-30Merge drm/drm-next into drm-misc-nextThomas Zimmermann758-7033/+25866
Backmerging to get drm-misc-next to v7.2-rc1. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
2026-06-30dt-bindings: iio: dac: ad5686: rework on power suppliesRodrigo Alencar1-2/+32
Add supplies for VDD, VLOGIC and VREF input voltage pins. The vcc-supply property is deprecated, once it does not really exist as none of the devices describe any power input with that name. VCC is also misleading as it sounds like the input power supply, but it is being used as an external voltage reference, which should be called VREF. Certain devices require vref-supply to be available once an internal reference voltage is absent. For correct operation vdd and vlogic supplies are required. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Rodrigo Alencar <rodrigo.alencar@analog.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-06-30dt-bindings: iio: dac: ad5686: add reset/ldac/gain supportRodrigo Alencar1-0/+38
Add GPIO property for RESET, LDAC and GAIN pin. RESET is active-low, LDAC is used to load DAC channels with values from input registers and GAIN can double the voltage in output channels. The gain-gpios property is not available to all supported parts. The adi,range-double property indicates that GAIN pin is hardwired to high in case gain-gpios is not set, otherwise it sets the initial value for the gain setting. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Rodrigo Alencar <rodrigo.alencar@analog.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-06-30dt-bindings: iio: dac: ad5696: rework on power suppliesRodrigo Alencar1-3/+31
Add supplies for VDD, VLOGIC and VREF input voltage pins. The vcc-supply property is deprecated, once it does not really exist as none of the devices describe any power input with that name. VCC is also misleading as it sounds like the input power supply, but it is being used as an external voltage reference, which should be called VREF. Certain devices require vref-supply to be available once an internal reference voltage is absent. For correct operation vdd and vlogic supplies are required. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Rodrigo Alencar <rodrigo.alencar@analog.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-06-30dt-bindings: iio: dac: ad5696: add reset/ldac/gain supportRodrigo Alencar1-0/+39
Add GPIO property for RESET, LDAC and GAIN pin. RESET is active-low, LDAC is used to load DAC channels with values from input registers and GAIN can double the voltage in output channels. The gain-gpios property is not available to all supported parts. The adi,range-double property indicates that GAIN pin is hardwired to high in case gain-gpios is not set, otherwise it sets the initial value for the gain setting. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Rodrigo Alencar <rodrigo.alencar@analog.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-06-30dt-bindings: iio: magnetometer: add QST QMC5883L SensorSiratul Islam1-0/+52
Add devicetree binding for the QST QMC5883L 3-Axis Magnetic Sensor connected via I2C. Used enum so that more devices could use this binding Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Siratul Islam <siratul.islam@linux.dev> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-06-30dt-bindings: add entry for qstcorpSiratul Islam1-0/+2
Add an entry for QST Corporation Limited Link: https://www.qstcorp.com/ Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Siratul Islam <siratul.islam@linux.dev> Link: https://www.qstcorp.com/ Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-06-30Documentation: ABI: testing: iio: minor cleanupManuel Ebner2-6/+6
Add parenthesis and dashes. Signed-off-by: Manuel Ebner <manuelebner@mailbox.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-06-30dt-bindings: iio: adc: hx711: add RATE GPIO propertyPiyush Patle1-0/+8
Document the optional RATE pin GPIO used to select the HX711 output data rate. Update the example to show the property in use. Signed-off-by: Piyush Patle <piyushpatle228@gmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-06-30dt-bindings: iio: adc: hx711: add VSUP and DVDD supply propertiesPiyush Patle1-0/+13
Document the optional VSUP supply used by the HX711 on-chip regulator. Also document the DVDD digital supply. DVDD is a board-supplied digital input rail (figure 1 of the datasheet shows it as a separate supply, not merely a bypass capacitor point) that was missing from the original binding. Signed-off-by: Piyush Patle <piyushpatle228@gmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-06-30Documentation: ABI: testing: add common ABI file for iio/frequencyRodrigo Alencar2-10/+11
Add ABI documentation file for PLL/DDS devices with frequency_resolution sysfs entry attribute used by both ADF4350 and ADF41513. Tested-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Rodrigo Alencar <rodrigo.alencar@analog.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-06-30docs: iio: add documentation for adf41513 driverRodrigo Alencar2-0/+200
Add documentation for ADF41513 driver, which describes the device driver files and shows how userspace may consume the ABI for various tasks. Tested-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Rodrigo Alencar <rodrigo.alencar@analog.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-06-29docs: clk: include some identifiers to keep documentation up to dateBrian Masney1-46/+12
The clk documentation currently has a separate list of some members of struct clk_core and struct clk_ops. Now that all of these structures have proper kernel docs, let's go ahead and just include them here via the identifiers statement in kerneldoc. While changes are being made here, let's also include the clk flags. Reviewed-by: Maxime Ripard <mripard@kernel.org> Acked-by: Randy Dunlap <rdunlap@infradead.org> Tested-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Brian Masney <bmasney@redhat.com>
2026-06-29vfio/pci: Expose latched module parameter policy in debugfsAlex Williamson1-0/+26
The nointxmask and disable_idle_d3 module parameters remain writable, but vfio-pci now latches their values into each device at init. Once a device is registered, changing the module parameter only affects future devices, leaving no direct way to confirm the effective policy for an existing device. Add a pci debugfs directory under the VFIO device debugfs root and report the per-device nointxmask and disable_idle_d3 values. These are read-only debugfs views and use the same Y/N bool output convention as the module parameters. Read-only vfio-pci parameters, such as disable_vga, are not exposed here because they cannot drift from the latched device value, therefore the existing module parameter exposure via sysfs is sufficient. Note that while only vfio-pci currently provides these options, the implementation is in vfio-pci-core and therefore properly reflects the device policy in the core, regardless of driver. Assisted-by: OpenAI Codex:gpt-5 Cc: Guixin Liu <kanie@linux.alibaba.com> Signed-off-by: Alex Williamson <alex.williamson@nvidia.com> Reviewed-by: Kevin Tian <kevin.tian@intel.com> Link: https://lore.kernel.org/r/20260615191241.688297-7-alex.williamson@nvidia.com Signed-off-by: Alex Williamson <alex@shazbot.org>
2026-06-29dt-bindings: arm: fsl: add TQMa8MPxS boardPaul Gerber1-0/+12
TQMa8MPxS is a SOM family using NXP i.MX8MP CPU family. MB-SMARC-2 is an evaluation mainbord for this SOM The SOM needs a mainboard, therefore we provide two compatibles here: "tq,imx8mp-<SOM>" for the module and "tq,imx8mp-<SOM>-<SBC>" Signed-off-by: Paul Gerber <paul.gerber@tq-group.com> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-06-29dt-bindings: soc: imx: fsl,imx93-media-blk-ctrl: Allow LVDS Display Bridge ↵Liu Ying1-0/+39
child node i.MX93 SoC mediamix blk-ctrl contains one LDB_CTRL register and one LVDS register which control video output through a LVDS interface. Allow the LVDS Display Bridge(LDB) child node and add the child node to example. i.MX93 LDB child node(bridge@20) is an addressable node, while i.MX93 Parallel Display Format Configuration(PDFC) child node(dpi-bridge) is a non-addressable node. Mixing the addressable and non-addressable child nodes is allowed according to discussion [1]. Link: https://lore.kernel.org/all/n6akxiayi3g6gxcqhreb4iaohmeokoalnqup6h5r2fwdt4zijt@u2wyps55ayqm/ [1] Signed-off-by: Liu Ying <victor.liu@nxp.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-06-29cgroup/cpu: document cpu.stat.local and clarify cpu.stat behaviorSun Shaojie1-1/+22
Add documentation for the cpu.stat.local interface file, which reports the throttled_usec stat -- the actual throttling time incurred by the cgroup's own runqueues, which may include throttling inherited from ancestor cgroup bandwidth limits. Unlike cpu.stat's throttled_usec which only accounts for throttling caused by the cgroup's own CFS bandwidth limit. When the controller is not enabled, the stat is not reported. Also clarify cpu.stat descriptions: note that the three base CPU usage stats (usage_usec, user_usec, system_usec) include descendant cgroups, and that the five CFS bandwidth stats are non-hierarchical -- they only account for throttling caused by the cgroup's own bandwidth limit. Signed-off-by: Sun Shaojie <sunshaojie@kylinos.cn> Acked-by: Michal Koutný <mkoutny@suse.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2026-06-29dt-bindings: iio: frequency: add adf41513Rodrigo Alencar1-0/+227
DT-bindings for ADF41513, an ultralow noise PLL frequency synthesizer that can be used to implement local oscillators (LOs) as high as 26.5 GHz. Some properties are based upon an existing PLL device properties (e.g. ADF4350). Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Rodrigo Alencar <rodrigo.alencar@analog.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-06-29regulator: dt-bindings: qcom,sdm845-refgen-regulator: Document IPQ9650Kathiravan Thirumoorthy1-3/+28
IPQ9650 has two REFGEN blocks which provide reference current to the PCIe, USB and UNIPHY PHYs. Unlike other supported platforms, IPQ9650 requires the REFGEN clocks to be enabled explicitly. Document the IPQ9650 compatible and the required clocks for it. While at it, move the allOf block after the 'required' property section. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com> Link: https://patch.msgid.link/20260617-ipq9650_refgen-v4-2-c505ea6c6661@oss.qualcomm.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-06-29spi: dt-bindings: st,stm32-qspi: Add power-domains propertyPatrice Chotard1-0/+3
STM32 QSPI may be in a power domain. Allow a single 'power-domains' entry for STM32 QSPI. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260618-add_power_domain_for_qpsi-v1-1-4d7e57bcfb9a@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-06-29ASoC: dt-bindings: mtk-btcvsd-snd: Convert to DT SchemaLuca Leonardo Scorcia2-24/+59
Convert the mtk-btcvsd-snd.txt DT binding to DT Schema format. Signed-off-by: Luca Leonardo Scorcia <l.scorcia@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260615185810.11804-1-l.scorcia@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-06-29spi: dt-bindings: octeon: Convert to DT schemaNinad Naik2-33/+61
Convert octeon-3010 to DT schema Signed-off-by: Ninad Naik <ninadnaik07@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260618180149.475658-1-ninadnaik07@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-06-29dt-bindings: clock: Add ESWIN eic7700 HSP clock and reset generatorXuyang Dong1-0/+63
Add bindings for the high-speed peripherals clock and reset generator on the ESWIN EIC7700 HSP. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Xuyang Dong <dongxuyang@eswincomputing.com> Signed-off-by: Brian Masney <bmasney@redhat.com>
2026-06-29dt-bindings: net: altr,socfpga-stmmac: add more interrupts for Agilex5Dinh Nguyen1-1/+45
The stmmac hardware on Agilex5 supports 8 TX/RX queue pairs and is dma-coherent. Update the schema to handle the hardware differences between SoC variants. Also make 'interrupts' and 'interrupt-names' as required properties. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> --- v2: Set the top level interrupts to include the widest contraints(1-17) Just have 1 list of all interrupt-names Update commit message to include 'interrupts' and 'interrupt-names' as required properties Change minItems 1 to maxItems 1 for non agilex5 variants Add same constraint for interrupt-names
2026-06-29dt-bindings: input: sun4i-lradc-keys: Add A100/A133 compatibleAlexander Sverdlin1-0/+1
The Allwinner A100/A133 SoCs have an LRADC which is compatible with the versions in existing SoCs. Add a compatible string for A100, with the R329 fallback. Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20260623204824.691832-5-alexander.sverdlin@gmail.com Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
2026-06-29dt-bindings: arm: sunxi: Add Baijie HelperBoard A133 compatibleAlexander Sverdlin1-0/+6
Baijie HelperBoard A133 is a development board around their A133 Core board. Introduce a compatible for both the Core and the development boards. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Link: https://patch.msgid.link/20260623204824.691832-4-alexander.sverdlin@gmail.com Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
2026-06-29dt-bindings: vendor-prefixes: Add Shenzhen Baijie Technology Co., Ltd.Alexander Sverdlin1-0/+2
Shenzhen Baijie Technology Co., Ltd. focuses on R&D and production of embedded products as well as customization of embedded solutions. Link: https://szbaijie.com/ Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Paul Kocialkowski <paulk@sys-base.io> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Link: https://patch.msgid.link/20260623204824.691832-3-alexander.sverdlin@gmail.com Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
2026-06-29docs: hwmon: ltc4283: fix malformed table docs build errorRandy Dunlap1-2/+2
Expand the table borders (upper & lower) to prevent a documentation build error: Documentation/hwmon/ltc4283.rst:261: ERROR: Malformed table. Text in column margin in table line 3. ======================= ========================================== power1_failed_fault_log Set to 1 by a power1 fault occurring. power1_good_input_fault_log Set to 1 by a power1 good input fault occurring at PGIO3. Fixes: dd63353a0b5e ("hwmon: ltc4283: Add support for the LTC4283 Swap Controller") Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20260620011833.3568693-1-rdunlap@infradead.org Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2026-06-29cxl: docs/linux/dax-driver - fix typosZenghui Yu1-2/+2
Fix two obvious typos in the "kmem conversion" section. Signed-off-by: Zenghui Yu <zenghui.yu@linux.dev> Reviewed-by: Alison Schofield <alison.schofield@intel.com> Reviewed-by: Dongliang Mu <dzm91@hust.edu.cn> Acked-by: Randy Dunlap <rdunlap@infradead.org> Link: https://patch.msgid.link/20260614161458.88942-1-zenghui.yu@linux.dev Signed-off-by: Dave Jiang <dave.jiang@intel.com>
2026-06-29dt-bindings: gpu: img,powervr-*: Add maintainer entriesMatt Coster2-2/+6
These entries were previously unaligned with MAINTAINERS, but will be even more so now that entries are being changed there. Bring them in sync by replacing the list here with the updated one from MAINTAINERS. Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Frank Binns <frank.binns@imgtec.com> Reviewed-by: Alessio Belle <alessio.belle@imgtec.com> Acked-by: Luigi Santivetti <luigi.santivetti@imgtec.com> Link: https://patch.msgid.link/20260626-maintainer-updates-v2-3-e1b3f246c44c@imgtec.com Signed-off-by: Matt Coster <matt.coster@imgtec.com>
2026-06-29dt-bindings: interrupt-controller: realtek,rtl-intc: Allow 2 interrupt cellsMarkus Stockhausen1-2/+3
The Realtek Otto SoC interrupt controller supports hardware interrupt routing to multiple parent CPU interrupt lines. To utilize this multi-domain support, peripheral devices need a way to explicitly specify their desired parent interrupt line in the device tree. Update the "#interrupt-cells" property to accept either 1 or 2 cells. 1 cell: Specifies the hardware interrupt index, implicitly routing it to the first available parent (maintaining backward compatibility). 2 cells: The first cell specifies the hardware interrupt index and the second cell specifies the targeted parent interrupt index. Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20260605211646.2101652-2-markus.stockhausen@gmx.de
2026-06-29Documentation: ABI: add stratix10-rsu QSPI size and erase_size sysfsTze Yee Ng1-0/+58
Document the eight read-only sysfs files (size0-size3, erase_size0- erase_size3) under platform/stratix10-rsu: flash size and erase size in bytes, 32-bit hex per line, EIO when the value is not available. Signed-off-by: Tze Yee Ng <tze.yee.ng@altera.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2026-06-29dt-bindings: arm: altera: Add Agilex72 SoCFPGA compatible stringsNazim Amirul1-0/+6
Add the SoC and board compatible strings for the Intel SoCFPGA Agilex72 platform. Signed-off-by: Nazim Amirul <muhammad.nazim.amirul.nazle.asmade@altera.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2026-06-29cpu/hotplug: Fix NULL kobject warning in cpuhp_smt_enable()Jinjie Ruan1-12/+16
On arm64, when booting with `maxcpus` greater than the number of present CPUs (e.g., QEMU -smp cpus=4,maxcpus=8), some CPUs are marked as 'present' but have not yet been registered via register_cpu(). Consequently, the per-cpu device objects for these CPUs are not yet initialized. In cpuhp_smt_enable(), the code iterates over all present CPUs. Calling _cpu_up() for these unregistered CPUs eventually leads to sysfs_create_group() being called with a NULL kobject (or a kobject without a directory), triggering the following warning in fs/sysfs/group.c: WARNING: fs/sysfs/group.c:137 at internal_create_group+0x41c/0x4bc, CPU#2: sh/181 [...] Call trace: internal_create_group+0x41c/0x4bc (P) sysfs_create_group+0x18/0x24 topology_add_dev+0x1c/0x28 cpuhp_invoke_callback+0x104/0x20c __cpuhp_invoke_callback_range+0x94/0x11c _cpu_up+0x200/0x37c When booting with ACPI, arm64 smp_prepare_cpus() currently sets all enumerated CPUs as "present" regardless of their status in the MADT. This causes issues with SMT hotplug control. For instance, with QEMU's "-smp 4,maxcpus=8" configuration, the MADT GICC entries are populated as follows: 1. The first four CPUs: `Enabled` set but `Online Capable` not set. 2. The remaining four CPUs: `Online Capable` set but `Enabled` not set to support potential hot-plugging. Fix this by: 1. When booting with ACPI, checking the ACPI_MADT_ENABLED flag in the GICC entry before calling set_cpu_present() during SMP initialization. 2. Properly managing the present mask in acpi_map_cpu() and acpi_unmap_cpu() to support actual CPU hotplug events, This aligns with other architectures like x86 and LoongArch. 3. Update the arm64 CPU hotplug documentation to no longer state that all online-capable vCPUs are marked as present by the kernel at boot time. This ensures that only physically available or explicitly enabled CPUs are in the present mask, keeping the SMT control logic consistent with the actual hardware state. Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Jonathan Cameron <jic23@kernel.org> Cc: James Morse <james.morse@arm.com> Cc: Yicong Yang <yangyicong@hisilicon.com> Cc: stable@vger.kernel.org Link: https://uefi.org/specs/ACPI/6.5/05_ACPI_Software_Programming_Model.html#gic-cpu-interface-gicc-structure Fixes: eed4583bcf9a ("arm64: Kconfig: Enable HOTPLUG_SMT") Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Suggested-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com> Signed-off-by: Will Deacon <will@kernel.org>
2026-06-29dt-bindings: soc: samsung: exynos-sysreg: Add hsi0 for ExynosAutov920Sanghoon Bae1-0/+1
Add hsi0 compatible on samsung,exynos-sysreg To support ExynosAutov920 PCIe settings: - PCIe PHY power control - PLL settings for PCIe - PCIe device direction (RC/EP) Signed-off-by: Sanghoon Bae <sh86.bae@samsung.com> Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260610050326.2903402-2-sh86.bae@samsung.com Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2026-06-29dt-bindings: clock: Add Amlogic A9 AO clock controllerJian Hu1-0/+76
Add the Always-On clock controller dt-bindings for the Amlogic A9 SoC family. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Jian Hu <jian.hu@amlogic.com> Link: https://patch.msgid.link/20260623-a9_aoclk-v5-1-c7cb1ff9ebf1@amlogic.com Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2026-06-29docs: document idmapped overlay mountsChristian Brauner1-0/+16
Describe that the merged overlay mount itself can be turned into an idmapped mount with mount_setattr(2), how the overlay mount idmapping composes with any layer idmappings, and that the mounter's access to the underlying layers is unaffected. Link: https://patch.msgid.link/20260615-work-idmapped-overlayfs-v1-7-7381632aa402@kernel.org Reviewed-by: Amir Goldstein <amir73il@gmail.com> Signed-off-by: Christian Brauner (Amutable) <brauner@kernel.org>
2026-06-29Merge tag 'v7.2-rc1' of ↵Bartosz Golaszewski31-77/+423
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into gpio/for-next Linux 7.2-rc1
2026-06-28dt-bindings: arm: qcom: sort compatibles alphabetically by base SoCKathiravan Thirumoorthy1-245/+245
The compatible entries in qcom.yaml were not in alphabetical order by their base SoC compatible string (the last const: qcom,* in each block), making the file harder to audit and maintain. Sort the entries for better maintenance. No functional change; reordering only. Assisted-by: Claude:claude-sonnet-4-6 Suggested-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260625-reorg_qcom_binding-v1-1-f2c6501f7401@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
generated by cgit (git 2.54.0.dirty) at 2026-09-27 21:44:18 +0000