summaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2026-08-07Merge branch 'intel-idle-lpi'Rafael J. Wysocki5-325/+560
Merge an ACPI processor driver update related to ACPI _LPI support and the introduction of ACPI _LPI suppor to intel_idle based on that update for 7.3-rc1. * intel-idle-lpi: intel_idle: Update documentation after adding ACPI _LPI support intel_idle: Add ACPI _LPI support intel_idle: Prepare for adding ACPI _LPI support ACPI: processor: idle: Add switch for strict _LPI processing ACPI: processor: idle: Relocate acpi_processor_extract_lpi_info() ACPI: processor: idle: Introduce acpi_processor_extract_lpi_info() ACPI: processor: idle: Introduce too_many_states() for _LPI ACPI: processor: idle: Rework flatten_lpi_states() ACPI: processor: idle: Rearrange loop in acpi_processor_get_lpi_info() ACPI: processor: idle: Drop redundant _LPI presence checks ACPI: processor: idle: Rework first-level _LPI states processing ACPI: processor: idle: Rearrange acpi_processor_get_lpi_info() ACPI: processor: idle: Introduce lpi_state_debug() ACPI: processor: idle: Split acpi_processor_evaluate_lpi() ACPI: processor: idle: Rearrange acpi_processor_evaluate_lpi() ACPI: processor: idle: Unify debug in acpi_processor_evaluate_lpi() ACPI: processor: idle: Ignore _LPI states with SYSTEMIO entry method ACPI: processor: idle: Expand _LPI package sanity checks
2026-08-07Merge tag 'pinctrl-v7.2-3' of ↵Linus Torvalds3-6/+11
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control fixes from Linus Walleij: "Qualcomm fixes: some incorrectly defined groups in IPQ9650, two pins needing to be marked as GPIO in IPQ806X" * tag 'pinctrl-v7.2-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: pinctrl: qcom: ipq806x: mark pci reset as a GPIO pin function pinctrl: qcom: ipq806x: mark gpio as a GPIO pin function pinctrl: qcom: ipq9650: fix audio_sec_mclk_in1/out1 group pins
2026-08-07Merge branch 'pm-cpufreq'Rafael J. Wysocki19-314/+498
Merge cpufreq updates for 7.3-rc1: - Minor fixes and cleanups in assorted cpufreq drivers (Dan Carpenter, Guru Das Srinagesh, Haoxiang Li, Karl Mehltretter, Sasha Finkelstein, and Pan Chuang) - Fix cpufreq table creation and bios_limits() callback in the Rust bindings (Priya Bala Govindasamy) - Add IPQ5210 support to qcom-nvmem driver (Varadarajan Narayanan) - Adjust the .adjust_perf() cpufreq driver callback to allow the maximum performance value to be passed to drivers and update the intel_pstate driver to use it (Rafael Wysocki) - Set policy->cur to the actual requested frequency in the intel_pstate driver when the performance policy is used (Rafael Wysocki) - Simplify HWP handling on Broadwell processors in intel_pstate (Rafael Wysocki) - Fix setting minimum P-state at init time in intel_pstate (Rafael Wysocki) - Consolidate frequency values computation in intel_pstate and clean up code in that driver (Rafael Wysocki) - Add missing kernel-doc desciptions for structure and union members in the amd-pstate driver (David Vernet) - Handle missing policy in dynamic EPP callbacks in the amd-pstate driver (EDAMAMEX) - Introduce EXPORT_SYMBOL_FOR_PSTATE_UT() to export amd-pstate driver symbols to the amd-pstate-ut subdriver (K Prateek Nayak) - Add dynamic EPP as an "energy_performance_preference" mode in amd-pstate, remove the "amd_dynamic_epp" kernel command line option and the "dynamic_epp" sysfs attribute, and update the dynamic_epp documentation accordingly (K Prateek Nayak) - Add unit tests for CPPC Performance Priority and the "dynamic" EPP mode in the amd-pstate driver (K Prateek Nayak) - Set min_limit_freq based on bios_min_perf in amd-pstate and remove the defensive check for bios_min_perf from it (K Prateek Nayak) - Fix EPP return type and handle errors in amd-pstate during initialization, toggle auto_sel in active mode on shared memory systems, and cache the firmware programmed EPP value (Marco Scardovi) - Skip tests in amd-pstate-ut if the amd-pstate driver is not in active use (Qianheng Peng) - Replace sprintf() with sysfs_emit() in sysfs show in the cpufreq schedutil governor and fix a self-contradictory comment in sugov_iowait_apply() (Zhongqiu Han) - Fix the usage example for the sampling_rate tunable of the ondemand cpufreq governor in admin-guide (wangxiaodong) * pm-cpufreq: (40 commits) cpufreq: imx6q: fix out-of-bounds write when probed more than once cpufreq: imx6q: fix devres accumulation across driver rebind rust: cpufreq: Fix temporary write in Registration::bios_limit_callback rust: cpufreq: Add CPUFREQ_TABLE_END as last table entry in TableBuilder::to_table cpufreq: intel_pstate: Adjust policy->cur in active mode to policy cpufreq/amd-pstate: Document missing kernel-doc members cpufreq/amd-pstate-ut: Add unit test for CPPC Performance Priority cpufreq/amd-pstate-ut: Add unit test for "dynamic" EPP mode cpufreq/amd-pstate: Reduce the scope of exported symbols Documentation/amd-pstate: Update dynamic_epp documentation with new behavior cpufreq/amd-pstate: Remove "amd_dynamic_epp" cmdline and "dynamic_epp" sysfs cpufreq/amd-pstate: Add dynamic EPP as an "energy_performance_preference" mode cpufreq/amd-pstate: Extract platform profile to EPP conversion into a helper cpufreq/amd-pstate: Remove the defensive check for bios_min_perf cpufreq/amd-pstate: Set min_limit_freq based on bios_min_perf cpufreq: apple-soc: Calculate frequency as a 64-bit value kselftest: cpufreq: Backup and restore governor for sptests selftests/cpufreq: Remove unnecessary sudo from quick_shuffle() selftests/cpufreq: Remove unused local variables from switch_show_governor() cpufreq/amd-pstate: handle missing policy in dynamic EPP callbacks ...
2026-08-07Merge branch 'pm-cpufreq-tests'Rafael J. Wysocki2-7/+37
Merge cpufreq test updates for 7.3-rc1: - Backup and restore governor for cpufreq sptests (Yiwei Lin) - Remove unnecessary sudo from quick_shuffle() and remove unused local variables from switch_show_governor() in cpufreq selftests (Jinseok Kim) * pm-cpufreq-tests: kselftest: cpufreq: Backup and restore governor for sptests selftests/cpufreq: Remove unnecessary sudo from quick_shuffle() selftests/cpufreq: Remove unused local variables from switch_show_governor()
2026-08-07pinctrl: airoha: add support of an7563 SoCMikhail Kshevetskiy3-0/+1125
This patch adds support of Airoha an7563 SoC pin controller. Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07dt-bindings: pinctrl: airoha: add support of an7563 pin controllerMikhail Kshevetskiy1-0/+350
Introduce device tree binding schema for Airoha AN7563 SoC pin controller. Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07pinctrl: airoha: try to find chip scu node by phandle firstMikhail Kshevetskiy5-3/+10
The "airoha,en7581-chip-scu" is not a good compatible string in the en7523 case. Let's search chip scu regmap with "airoha,chip-scu" phangle first and fallback to SoC specific chip scu compatible string on failure. Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07pinctrl: airoha: add support of en7523 SoCMikhail Kshevetskiy3-0/+1166
This patch adds support of Airoha en7523 SoC pin controller. Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07dt-bindings: pinctrl: airoha: add support of en7523 pin controllerMikhail Kshevetskiy1-0/+378
Introduce device tree binding schema for Airoha EN7523 SoC pin controller. Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07pinctrl: airoha: an7583: add support for olt pinmuxMikhail Kshevetskiy1-0/+18
Add support for olt pin function for olt pin group. Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07pinctrl: airoha: an7583: add support for pon_alt pinmuxMikhail Kshevetskiy1-2/+14
Add support for pon pin function for pon_alt pin group. Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07pinctrl: airoha: an7583: add support for npu_uart pinmuxMikhail Kshevetskiy1-1/+11
Add support for uart pin function for npu_uart pin group. Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07dt-bindings: pinctrl: airoha: an7583: add missed featuresMikhail Kshevetskiy1-3/+11
Changes: * add npu_uart pin-group support for uart pin-function * add pon_alt pin-group support for pon pin-function * add support for olt pin group/function Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07pinctrl: airoha: an7583: rename registers to match its an7583 namesMikhail Kshevetskiy1-5/+5
In the an7581 case the register at 0x1FA20214 is called RG_GPIO_2ND_I2C_MODE. The same register in the an7583 case is called RG_SW_TOD_1PPS_MODE. Let's rename this register to avoid potential confuse. Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07pinctrl: airoha: an7583: remove an7583 prefix from variable names and ↵Mikhail Kshevetskiy1-307/+307
definitions We have only an7583 specific code in the pinctrl-an7583 kernel module, so an7583 prefix is not necessary anymore. Remove it. Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07pinctrl: airoha: an7581: remove en7581 prefix from variable namesMikhail Kshevetskiy1-198/+198
We have only an7581 specific code in the pinctrl-an7581 kernel module, so 'en7581_' prefix is not necessary anymore. Remove it. Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07pinctrl: airoha: split driver on shared code and SoC specific driversMikhail Kshevetskiy6-2374/+2999
Split combined an7581/an7583 source file on a * shared pinctrl code (pinctrl-airoha.c) * an7581 specific pinctrl driver (pinctrl-an7581.c) * an7583 specific pinctrl driver (pinctrl-an7583.c) Ininialization code was adapted a bit to work properly for shared and SoC specific cases. Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07pinctrl: airoha: move common definitions to the separate headerMikhail Kshevetskiy2-270/+283
Let's move the SoC independent definitions and declarations of structures required for Airoha SoC-specific pinctrl drivers to a common header. Later we'll have several SoC-specific drivers, so this step is necessary. We will not move to the common header file other register addresses, register bitfields definitions and macroses that use SoC specific information. We will keep SoC specific definitions inside SoC specific files. No functional changes. Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07pinctrl: airoha: statically allocate gpio regs structureMikhail Kshevetskiy1-46/+46
just a small refactoring to collect all gpio register information in the one statically allocated structure. Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07pinctrl: airoha: remove not needed irq_type[] arrayMikhail Kshevetskiy1-14/+8
irq_type[] array inside airoha_pinctrl_gpiochip structure is not actually necessary. Use trigger type from 'struct irq_data' instead. Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Acked-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07pinctrl: airoha: fix edge-triggered interrupts handlingMikhail Kshevetskiy1-4/+33
Edge-triggered interrupts are handled incorrectly because of * no irq_ack() handler was defined, * no handle_level_irq() handler was used, This patch probably fixes an issue Fixes: 1c8ace2d0725 ("pinctrl: airoha: Add support for EN7581 SoC") Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Acked-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07pinctrl: airoha: fix IRQ mask/unmask codeMikhail Kshevetskiy1-0/+2
When using IRQCHIP_IMMUTABLE, airoha_irq_unmask() must manually call gpiochip_enable_irq() and airoha_irq_mask() must call gpiochip_disable_irq(). Without these calls, gpiolib never sets the GPIOD_FLAG_IRQ_IS_ENABLED bit. Because this bit is missing, gpiod_direction_output() will not realize the pin is actively used as an interrupt. Fixes: 1c8ace2d0725 ("pinctrl: airoha: Add support for EN7581 SoC") Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Acked-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07pinctrl: airoha: add missed IRQ resource helpersMikhail Kshevetskiy1-0/+1
Without hooking .irq_request_resources, gpiolib cannot set GPIOD_FLAG_USED_AS_IRQ. This breaks pin direction locking and can allow userspace or another driver to reconfigure an active IRQ pin as an output Fixes: 1c8ace2d0725 ("pinctrl: airoha: Add support for EN7581 SoC") Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Acked-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07pinctrl: airoha: fix getting gpiochip/pinctrl pointers in the IRQ handling codeMikhail Kshevetskiy1-11/+9
airoha_irq_unmask(), airoha_irq_mask(), airoha_irq_type() functions impements brain damaged logic to retrieve gpiochip and pinctrl pointers. Details: gpiochip = irq_data_get_irq_chip_data(data); will initialize gpiochip variable with data->chip_data value. This value initialized inside gpiochip_irq_map() function static int gpiochip_irq_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hwirq) { struct gpio_chip *gc = d->host_data; ... irq_set_chip_data(irq, gc); ... } Thus gpiochip variable of 'struct airoha_pinctrl_gpiochip *' type will be initialized with a pointer to a variable of 'struct gpio_chip' type. Luckily, gpio_chip is the first element of airoha_pinctrl_gpiochip, so gpiochip pointer will get a correct value. This patch implements correct logic of getting gpiochip and pinctrl pointers. Fixes: 1c8ace2d0725 ("pinctrl: airoha: Add support for EN7581 SoC") Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07pinctrl: airoha: minor improvementsMikhail Kshevetskiy1-13/+43
Changes: * use field_get() macro instead of direct bit operations * improve error handling Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07pinctrl: airoha: add set_direction() helper for gpio_chipMikhail Kshevetskiy1-18/+34
The patch creates set_direction() helper for gpio_chip abstraction. It also implements/reimplements some function using newly defined helper. This is cosmetic patch used to place gpio_chip specific code together. No functional changes. Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07pinctrl: airoha: add missed get_direction() function for gpio_chipMikhail Kshevetskiy1-16/+34
This patch adds missed get_direction() function for gpio_chip. Also it reimplements pinconf's get_direction() function using newly defined function. Fixes: 1c8ace2d0725 ("pinctrl: airoha: Add support for EN7581 SoC") Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07pinctrl: airoha: an7583: fix spi group pinsMikhail Kshevetskiy1-1/+1
pcm pins were used insted of spi pins. This patch fixes an issue. Thanks to Daniel Schwierzeck for noticing it. Fixes: 3ffeb17a9a27 ("pinctrl: airoha: add support for Airoha AN7583 PINs") Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07pinctrl: airoha: fix AN7583 MDIO pin mux configDaniel Schwierzeck1-10/+6
an7583_mdio_pins[] pointed at pins 43/44 (I2C1_SDA/I2C1_SCL) instead of pins 53/54 (MDC_0/MDIO_0 respectively GPIO 51/52). Also the MDIO function group wrote GPIO_SGMII_MDIO_MODE_MASK (bit 13 of REG_GPIO_PON_MODE, an unrelated SGMII MDIO mode) and GPIO_MDC_IO_MASTER_MODE_MODE (BIT(14), an EN7581 specific bit from REG_GPIO_2ND_I2C_MODE). Fix both by setting an7583_mdio_pins[] to { 53, 54 } and rewriting the function group to clear AN7583_MDC_0_GPIO_MODE_MASK (bit 25) and AN7583_MDIO_0_GPIO_MODE_MASK (bit 26) of REG_GPIO_PON_MODE. Both bits are cleared by the hwinit at probe. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07pinctrl: airoha: fix I2C pin mux config for AN7583Daniel Schwierzeck1-1/+24
On AN7583 both I2C busses have a pin sharing with GPIO. Also the pin mux setting is done in REG_GPIO_PON_MODE instead of REG_GPIO_2ND_I2C_MODE. Add dedicated I2C pin groups and function groups for AN7583. The new groups must support i2c0 and i2c1. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07dt-bindings: pinctrl: airoha: an7583: add i2c0 group for i2c functionMikhail Kshevetskiy1-1/+1
add mux to force enable i2c0 bus. Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07pinctrl: airoha: fix I2C1 pin mux config for AN7581Daniel Schwierzeck1-2/+2
The pin mux on GPIOs 1 and 2 on AN7581 supports I2C in master and slave mode. When selecting I2C the according bits (bit 13 for master, bit 11 for slave) must be set in REG_GPIO_2ND_I2C_MODE. Fix the i2c1 pin group to set bits 0 and 13 to set I2C1 master mode by default. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07pinctrl: airoha: an7583: fix muxing of non-gpio default pinsMikhail Kshevetskiy1-13/+86
Current an7583 pinmux implementation have following issues: * pins 51 and 52 can't be set as pcie_reset, current pcie_reset code will sets pins to gpio mode instead. * there is no proper way to set pins 41--54 to gpio mode. * pins 41--53 can't be actually set as pwm pins. These pins must be muxed to gpio mode as well. This patch fixes above issues. Fixes: 3ffeb17a9a27 ("pinctrl: airoha: add support for Airoha AN7583 PINs") Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07dt-bindings: pinctrl: airoha: an7583: allow configuration of non-gpio ↵Mikhail Kshevetskiy1-2/+14
default pins as gpio and pwm Some AN7583 pins have non-gpio default settings. This patch provides a way to configure such pins as GPIO or PWM. Also add gpio-range property in the dts example. Please note that gpio52 pin can't be configured as PWM pin. Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07pinctrl: airoha: an7581: fix mux/conf of pcie_reset pinsMikhail Kshevetskiy1-25/+97
In the an7581 case * gpio47 and pcie_reset0 shares pin 60, * gpio48 and pcie_reset1 shares pin 61, * gpio49 and pcie_reset2 shares pin 62. but current driver treat them as pins 61--63. This is wrong. Also current an7581 pinmux implementation have following issues: * current pcie_reset pin function actually sets corresponding pins as gpios. * there is no proper way to set pcie_reset pins as gpios. * there is no way to set pcie_reset pins as pwm. This patch fixes above issues. WARNING: There is a contradiction in the Airoha documentation. AN7581 programming guide claims: - gpio44 and pcie_reset0 shares the same pin - gpio45 and pcie_reset1 shares the same pin - gpio46 and pcie_reset2 shares the same pin While AN7581 datasheet claims: - gpio47 and pcie_reset0 shares the same pin - gpio48 and pcie_reset1 shares the same pin - gpio49 and pcie_reset2 shares the same pin The datasheet should be considered as a more reliable source. Thanks to Benjamin Larsson for clarification. Fixes: 1c8ace2d0725 ("pinctrl: airoha: Add support for EN7581 SoC") Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07dt-bindings: pinctrl: airoha: en7581: allow configuration of pcie_reset pins ↵Mikhail Kshevetskiy1-2/+13
as gpio or pwm In the an7581 case * gpio47 and pcie_reset0 shares the same pin, * gpio48 and pcie_reset1 shares the same pin, * gpio49 and pcie_reset2 shares the same pin. Let's define a way to configure these pins as gpio or pwm. Also add gpio-range property in the dts example. Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07pinctrl: airoha: an7583: fix I2C0_SDA_PD register bit orderMikhail Kshevetskiy1-2/+2
I2C1_SCL_PD and RG_I2C1_SDA_PD bits are swapped, fix it. Fixes: 3ffeb17a9a27 ("pinctrl: airoha: add support for Airoha AN7583 PINs") Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07pinctrl: airoha: an7581: fix pinconf of i2c_scl/i2c_sda pinsMikhail Kshevetskiy1-8/+8
Pinconfs of i2c_sda/i2c_scl pins are swapped, this needs to be fixed. Fixes: 1c8ace2d0725 ("pinctrl: airoha: Add support for EN7581 SoC") Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07pinctrl: airoha: fix mdio bitfield namesMikhail Kshevetskiy1-5/+6
Fix misprint in mdio bitfield name of GPIO_2ND_I2C_MODE register. While at it also fix an7583 mdio. It should use an7583 specific mdio bitfield. Fixes: 1c8ace2d0725 ("pinctrl: airoha: Add support for EN7581 SoC") Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Acked-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07dt-bindings: pinctrl: airoha: an7583: fix device tree binding schemaMikhail Kshevetskiy1-23/+14
An7583 device tree binding schema was more or less blinly copied from corresponding en7581 schema. As result it's not correct. There are following issues: * i2s pin-function is not really defined for an7583 * i2s pin-function by mistake was replaced by i2c pin-function in the functions/groups checks * pcm_spi pin-function defined for less number of pin-groups * pwm pin-function should have more pin-groups elements * unexisting pins was defined Fix an7583 schema, so it matches actual pinctrl driver. Fixes: e6e47d31d3f8 ("dt-bindings: pinctrl: airoha: Document AN7583 Pin Controller") Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07dt-bindings: pinctrl: airoha: en7581: fix misprint in i2s function nameMikhail Kshevetskiy1-1/+1
Due to misprint i2s pin-function is missed, instead i2c pin-function defined twice. The second of them operates with i2s pin-group. Let's fix the typo so that the i2s function is defined correctly. Fixes: d0c15cb96b74 ("dt-bindings: pinctrl: airoha: Add EN7581 pinctrl") Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07ALSA: hda/realtek: Fix speakers on ASUS ROG Zephyrus G14 GA403UMGarrett Blackmon1-0/+1
The GA403UM (SSID 1043:1044) uses the same ALC285 codec + dual CS35L56 I2C amplifier topology as the GA403U and GA403W variants, which already have quirk entries (1043:1b13, 1043:1024). Without the quirk, the woofers sit on a separate DAC from the tweeters, so the hardware volume control only scales part of the speaker system and the headset microphone pins are not configured. Apply the existing ALC285_FIXUP_ASUS_GA403U_HEADSET_MIC fixup to the GA403UM as well. Signed-off-by: Garrett Blackmon <garrett@blackmon.dev> Link: https://patch.msgid.link/20260807150708.33785-1-garrett@blackmon.dev Signed-off-by: Takashi Iwai <tiwai@suse.de>
2026-08-07ALSA: hda/conexant: Add pin config quirk for Huawei MatebookZhang Heng1-0/+9
The headphone jack is not detected on this Huawei Matebook (Conexant SN6140 codec). The BIOS incorrectly marks Pin 0x18 as [N/A], causing the driver to report hp_outs=0 and no "Headphones" output appears. Override the pin configuration for NID 0x18 to set it as a headphone jack, which restores proper detection and audio routing. Link: https://github.com/thesofproject/sof/issues/10687 Signed-off-by: Zhang Heng <zhangheng@kylinos.cn> Signed-off-by: Takashi Iwai <tiwai@suse.de> Link: https://patch.msgid.link/20260807125857.678297-4-zhangheng@kylinos.cn
2026-08-07ALSA: hda/realtek: Fix headset mic on ASUS Vivobook S14 S5406SAZhang Heng1-0/+1
On the ASUS Vivobook S14 S5406SA (subsystem 0x104310c4, Lunar Lake platform) with an ALC294 codec, the headset microphone (3.5mm jack) fails to capture any audio. Adding the ALC2XX_FIXUP_HEADSET_MIC quirk resolves the issue and restores proper headset mic recording. Link: https://github.com/thesofproject/linux/issues/5729 Signed-off-by: Zhang Heng <zhangheng@kylinos.cn> Signed-off-by: Takashi Iwai <tiwai@suse.de> Link: https://patch.msgid.link/20260807125857.678297-3-zhangheng@kylinos.cn
2026-08-07ALSA: hda/realtek: Add quirk for Acer Gadget E10 ETBook left speakerZhang Heng1-0/+1
The Acer Gadget E10 ETBook (subsystem 0x1e50:0x7036, Realtek ALC233) has a left speaker that does not work by default. The BIOS fails to properly configure pin 0x1b, leaving it unconnected. Using hdajackretask to override pin 0x1b as "Internal Speaker" restores left speaker functionality. Add a quirk to apply this pin configuration automatically at probe time. Closes: https://bugzilla.kernel.org/show_bug.cgi?id=221435 Signed-off-by: Zhang Heng <zhangheng@kylinos.cn> Signed-off-by: Takashi Iwai <tiwai@suse.de> Link: https://patch.msgid.link/20260807125857.678297-2-zhangheng@kylinos.cn
2026-08-07ALSA: hda/realtek: Add quirk for Acer Nitro ANV16-42 headset micZhang Heng1-0/+1
The Acer Nitro ANV16-42 (subsystem 0x1025:0x1909, Realtek ALC245) does not detect the headset microphone jack. Adding the ALC2XX_FIXUP_HEADSET_MIC quirk resolves the issue and restores proper headset mic functionality. Closes: https://bugzilla.kernel.org/show_bug.cgi?id=221623 Signed-off-by: Zhang Heng <zhangheng@kylinos.cn> Signed-off-by: Takashi Iwai <tiwai@suse.de> Link: https://patch.msgid.link/20260807125857.678297-1-zhangheng@kylinos.cn
2026-08-07Merge branch 'acpi-irqchip'Rafael J. Wysocki13-154/+223
Merge irqchip changes related to ACPI support that are needed to enable GICv5 IWB ACPI probe ordering detection on ARM, including the addition of acpi_device_clear_deps() and RISC-V interrupt controller management code refactoring to extract generic code from it into the common ACPI IRQ code (Lorenzo Pieralisi) * acpi-irqchip: irqchip/gic-v5: Enable GICv5 IWB ACPI probe ordering detection ACPI/IORT: Implement ACPI infrastructure to enable GICv5 IWB probe deferral ACPI: irq: Move RISC-V interrupt controllers autodep to ACPI IRQ code ACPI: RISC-V: Fix riscv_acpi_add_prt_dep() loop handling ACPI: RISC-V: Check acpi_get_handle() status in riscv_acpi_add_prt_dep() ACPI: RISC-V: Fix riscv_acpi_irq_get_dep() loop termination ACPI: Add acpi_device_clear_deps() helper function
2026-08-07scsi: fnic: Fix invalid comparison for errorRoman Demidov1-1/+1
The current comparison err != ERR_ECMDUNKNOWN is useless because err < 0 and ERR_ECMDUNKNOWN == 5. The logic is that if the CMD_CAPABILITY command was executed, there is no need to respond to unknown errors. Therefore, the sign of the number in the comparison must be changed. Found by Linux Verification Center (linuxtesting.org) with SVACE. Signed-off-by: Roman Demidov <roman.demidov.nn@gmail.com> Reviewed-by: Karan Tilak Kumar <kartilak@cisco.com> Link: https://patch.msgid.link/20260807091852.13151-1-roman.demidov.nn@gmail.com Signed-off-by: Martin K. Petersen (Oracle) <mkp@kernel.org>
2026-08-07Merge branches 'acpi-numa', 'acpi-misc' and 'pnp'Rafael J. Wysocki6-15/+23
Merge and ACPI support update related to NUMA, miscellaneous updates related to ACPI support, and PNP updates for 7.3-rc1: - Remove a node_set() call that is redundant from acpi_parse_memory_affinity() (Sang-Heon Jeon) - Prevent kernel-doc warnings by converting 2 function description comments to kernel-doc format (Randy Dunlap) - Fix docs build error in the ACPI admin-guide documentation (Randy Dunlap) - Replace __get_free_page() with kmalloc() in the code handling ACPI NVS memory during system suspend/resume (Mike Rapoport) - Fix card device cleanup on registration failure in the core PNP code (Yuho Choi) - Dropi an unused assignment of pnp_device_id driver data (Uwe Kleine-König) * acpi-numa: ACPI: NUMA: remove redundant node_set() call * acpi-misc: ACPI: pmtmr: Convert to kernel-doc format docs: ACPI: DSD: motorcomm: fix docs build error ACPI: NVS: replace __get_free_page() with kmalloc() * pnp: PNP: Fix card device cleanup on registration failure PNP: Drop unused assignment of pnp_device_id driver data
2026-08-07spi: use modern PM macrosMark Brown43-289/+195
Jisheng Zhang <jszhang@kernel.org> says: Use the modern PM macros for the suspend and resume functions to be automatically dropped by the compiler when CONFIG_PM or CONFIG_PM_SLEEP are disabled, without having to use #ifdef guards or __maybe_unused. Compiled testd for arm, arm64, riscv and riscv64 with below combinations: !PM && !PM_SLEEP PM && !PM_SLEEP PM && PM_SLEEP Link: https://patch.msgid.link/20260803142003.12857-1-jszhang@kernel.org
generated by cgit (git 2.54.0.dirty) at 2026-09-29 18:24:32 +0000