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2026-08-18Merge rdma branch 'for-rc' into 'for-next'Jason Gunthorpe12-36/+80
These did not seem worth sending as a dedicated rc PR during the last week of the cycle. * ko-rdma/for-rc: RDMA/ipoib: Drain RCU callbacks during module teardown RDMA/mlx5: Drain RCU callbacks during module teardown RDMA/core: Wait for RCU callbacks before unloading ib_core RDMA/irdma: Prevent overflows in memory contiguity checks RDMA/siw: publish QP after initialization RDMA/hns: Fix potential integer overflow in mhop hem cleanup RDMA/core: Fix memory leak in __ib_create_cq() on invalid cqe RDMA/mana_ib: initialize err for empty send WR lists RDMA/erdma: initialize ret for empty receive WR lists RDMA/irdma: Prevent user-triggered null deref on QP create RDMA/irdma: Prevent rereg_mr for non-mem regions RDMA/cma: Fix hardware address comparison length in netevent callback RDMa/mlx5: Avoid frame overflow warning IB/mad: Drop unmatched RMPP responses before reassembly Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2026-08-18net: dsa: initial support for MT7628 embedded switchJoris Vaisvila3-0/+663
Add support for the MT7628 embedded switch. The switch has 5 built-in 100Mbps user ports (ports 0-4) and one 1Gbps port that is internally attached to the SoCs CPU MAC and serves as the CPU port. The switch hardware has a very limited 16 entry VLAN table. Configuring VLANs is the only way to control switch forwarding. Currently 6 entries are used by tag_8021q to isolate the ports. Double tag feature is enabled to force the switch to append the VLAN tag even if the incoming packet is already tagged, this simulates VLAN-unaware functionality and simplifies the tagger implementation. Signed-off-by: Joris Vaisvila <joey@tinyisr.com> Reviewed-by: Daniel Golle <daniel@makrotopia.org> Link: https://patch.msgid.link/20260813190241.789323-5-joey@tinyisr.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2026-08-18net: phy: mediatek: add phy driver for MT7628 built-in Fast Ethernet PHYsJoris Vaisvila3-1/+63
The Fast Ethernet PHYs present in the MT7628 SoCs require an undocumented bit to be set before they can establish 100mbps links. This commit adds the Kconfig option MEDIATEK_FE_SOC_PHY and the corresponding driver mtk-fe-soc.c. Signed-off-by: Joris Vaisvila <joey@tinyisr.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Daniel Golle <daniel@makrotopia.org> Link: https://patch.msgid.link/20260813190241.789323-3-joey@tinyisr.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2026-08-18net: pse-pd: realtek-pse-mcu: add UART transportJonas Jelonek3-0/+176
Add the serdev (UART) transport for the Realtek PSE MCU core. It registers the MCU as a serdev device and provides the send/recv callbacks the core uses to exchange the 12-byte frames, receiving asynchronously via the serdev receive_buf callback. The baud rate defaults to 19200 and can be overridden per board with the "current-speed" property. Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com> Reviewed-by: Kory Maincent <kory.maincent@bootlin.com> Link: https://patch.msgid.link/20260813222036.873930-5-jelonek.jonas@gmail.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2026-08-18net: pse-pd: realtek-pse-mcu: add I2C transportJonas Jelonek3-0/+160
Add the I2C/SMBus transport for the Realtek PSE MCU core. It registers the MCU on an I2C bus and provides the send/recv callbacks the core uses to exchange the 12-byte frames. The MCU firmware expects one of two framings on the I2C bus, and which one is part of the compatible: '-smbus' (reads carry a leading command byte and a repeated start) or raw '-i2c' (bare block writes and reads). The match data flags the raw-I2C case; SMBus is the default because that's what the majority of devices uses. Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com> Reviewed-by: Kory Maincent <kory.maincent@bootlin.com> Link: https://patch.msgid.link/20260813222036.873930-4-jelonek.jonas@gmail.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2026-08-18net: pse-pd: add Realtek PSE MCU coreJonas Jelonek4-0/+1099
A range of managed Realtek-based PoE switches use a small microcontroller on the PCB to front the actual PSE silicon. The host CPU talks to that MCU over I2C/SMBus or UART using a fixed 12-byte request/response protocol with a trailing checksum; the PSE chips are managed by the MCU and are not accessed directly. Two generations of the protocol exist - both Realtek's - diverging in opcode numbering and a few response layouts; the driver handles this with a per-dialect opcode table and parser hooks for the responses that differ, selected by the compatible. The specific PSE chip behind the MCU is detected at runtime and only influences per-chip constants (power scaling and the per-port cap). This core module implements the protocol, message framing, the dialect machinery and the pse_controller_ops glue, and exports a registration helper for transport modules. The I2C and UART transports that drive it follow in the next patches; the core (PSE_REALTEK_MCU) is selected automatically by those transports and is not user-selectable on its own. The realtek-pse-mcu-* files and PSE_REALTEK_MCU* symbols match the realtek,pse-mcu-* compatibles (see the binding for the naming rationale). The two protocol generations - gen1 on older Broadcom-PSE boards, gen2 on Realtek's own PSE silicon - are both Realtek's, handled by the same shared core, each selecting its dialect via the compatible. Power budgeting is left to the MCU firmware; the driver advertises PSE_BUDGET_EVAL_STRAT_DYNAMIC accordingly. Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com> Link: https://patch.msgid.link/20260813222036.873930-3-jelonek.jonas@gmail.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2026-08-18Merge tag 'v7.2' of ↵Bartosz Golaszewski1047-6012/+14488
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into gpio/for-next Linux 7.2
2026-08-18Merge tag 'regmap-irq-reqrel' of ↵Bartosz Golaszewski1-0/+22
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap into gpio/for-next regmap-irq: Provide IRQ resource request and release callbacks The users which rely on regmap IRQ to create the IRQ chip may also want to have an additional tracking of the IRQ requests and releases. Provide a callback for them.
2026-08-18platform/x86: hp-bioscfg: fix heap OOB read on empty password writeMuhammad Bilal1-1/+1
validate_password_input() computes length = strlen(buf) and then checks buf[length - 1] to strip a trailing newline, without checking that length is nonzero first. Writing an empty string (a bare '\n') to current_password or new_password gives length == 0, and buf[length - 1] reads buf[-1], one byte before the heap allocation holding the copied input. KASAN confirms this directly: BUG: KASAN: slab-out-of-bounds in store_password_instance.constprop.0+0x223/0x2a0 [hp_bioscfg] Read of size 1 at addr ffff88811bd8da9f by task sh/13740 ... store_password_instance.constprop.0+0x223/0x2a0 [hp_bioscfg] current_password_store+0x14/0x20 [hp_bioscfg] ... The buggy address is located 23 bytes to the right of allocated 8-byte region [ffff88811bd8da80, ffff88811bd8da88) Reproduced identically via new_password_store. Execution continues past the bad read (the garbage byte only affects whether "length" is decremented by one), so the write completes and returns success; this is a pure information read past the buffer, not a crash, but it is still an out-of-bounds access KASAN correctly flags. Fix by only checking buf[length - 1] when length is nonzero. Fixes: 8646a3b5ee3a ("platform/x86: hp-bioscfg: passwdobj-attributes") Cc: stable@vger.kernel.org Signed-off-by: Muhammad Bilal <meatuni001@gmail.com> Link: https://patch.msgid.link/20260812111829.172273-4-meatuni001@gmail.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2026-08-18platform/x86: hp-bioscfg: fix heap OOB read in sk_store() and kek_store()Muhammad Bilal1-2/+2
sk_store() and kek_store() strip a trailing newline from the sysfs write before allocating the key buffer: length = count; if (buf[length - 1] == '\n') length--; bioscfg_drv.spm_data.signing_key = kmemdup(buf, length, GFP_KERNEL); but then pass the original "count" (not "length") as the copy size to hp_wmi_perform_query(), which memcpy()s that many bytes out of the "length"-sized allocation, reading one byte past it whenever the write ends in a newline, the normal case for a shell "echo" into sysfs. KASAN confirms this directly: BUG: KASAN: slab-out-of-bounds in hp_wmi_perform_query+0x1e9/0x460 [hp_bioscfg] Read of size 28 at addr ffff88813c8e2b80 by task python3/16022 ... sk_store+0xa7/0x240 [hp_bioscfg] kernfs_fop_write_iter+0x3e1/0x5d0 ... The buggy address is located 0 bytes inside of allocated 27-byte region [ffff88813c8e2b80, ffff88813c8e2b9b) Reproduced identically for kek_store, and at multiple write sizes (28, 57, 201 bytes), each time reading exactly one byte past a kmemdup() allocation one byte smaller than the write. Fix by passing "length" instead of "count" to hp_wmi_perform_query() in both functions. Fixes: b2715aa2e135 ("platform/x86: hp-bioscfg: spmobj-attributes") Cc: stable@vger.kernel.org Signed-off-by: Muhammad Bilal <meatuni001@gmail.com> Link: https://patch.msgid.link/20260812111829.172273-3-meatuni001@gmail.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2026-08-18platform/x86: hp-bioscfg: fix off-by-one write in hp_get_string_from_buffer()Muhammad Bilal1-1/+1
hp_get_string_from_buffer() clamps the converted string length against the destination buffer size with "size > dst_size", so when the converted length is exactly equal to dst_size, conv_dst_size is left at dst_size and the unconditional NUL terminator write dst[conv_dst_size] = 0; lands one byte past the destination buffer. This is the same shape of bug as the previously fixed off-by-one in hp_convert_hexstr_to_str(): the buffer is sized correctly for the content, but the terminator write is never checked against that size. Fix by changing the comparison to ">=" so conv_dst_size is always left with room for the terminator. All fixed-size destinations that reach this function (path[512], current_value[512], current_password/current_value[64], and the per-entry buffers in encodings[][512] and prerequisites[][512]) are affected. Fixes: a34fc329b189 ("platform/x86: hp-bioscfg: bioscfg") Cc: stable@vger.kernel.org Signed-off-by: Muhammad Bilal <meatuni001@gmail.com> Link: https://patch.msgid.link/20260812111829.172273-2-meatuni001@gmail.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2026-08-18net/ionic: avoid OOB TX partner lookup for hwstamp RXQAnand Khoje2-3/+21
The dedicated hardware timestamp RX queue is allocated with q->index equal to lif->ionic->nrxqs_per_lif. The normal txqcqs array only contains the regular queue pairs, so using that index to set rxq->partner can read one entry past txqcqs[] and then write through the derived pointer. Only link RX/TX partners for normal queue-pair indexes. Leave the hwstamp RX queue unpaired, and make the XDP_TX path abort cleanly if an RX queue has no TX partner. Fixes: 8eeed8373e1c ("ionic: Add XDP_TX support") Reviewed-by: Si-Wei Liu <si-wei.liu@oracle.com> Reviewed-by: Shannon Nelson <sln@onemain.com> Cc: stable@vger.kernel.org Signed-off-by: Anand Khoje <anand.a.khoje@oracle.com> Reviewed-by: Simon Horman <horms@kernel.org> Reviewed-by: Brett Creeley <brett.creeley@amd.com> Link: https://patch.msgid.link/20260813083705.454897-1-anand.a.khoje@oracle.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2026-08-18Merge tag 'loongarch-kvm-7.3' of ↵Paolo Bonzini403-2213/+5568
git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson into HEAD LoongArch KVM changes for v7.3 1. Advertise already-supported capabilities. 2. Some bug fixes about timer and MMIO. 3. Some hardening about interrupt injection. 4. Replace kvm_err() with kvm_pr_unimpl(). 5. Add FPU/LSX/LASX test cases for selftests.
2026-08-18Merge tag 'kvm-s390-next-7.3-1' of ↵Paolo Bonzini11-95/+325
git://git.kernel.org/pub/scm/linux/kernel/git/kvms390/linux into HEAD KVM: s390: Features and Fixes for 7.3 - merged kvms390/master to pick up additional fixes that came too late for 7.2 - Fixes for vfio-ap - Fixes for the gmap rework - Fixes for vsie - AI triggered fixes all over - diag9c tracing - code move preparation for the additional arm64 support - enable CONTEXT_ANALYSIS - update to vfio maintainer file location
2026-08-18thermal/drivers/armada: Fix missing bitfields includeDaniel Lezcano1-0/+1
Add the missing include leading to the error: error: implicit declaration of function ‘FIELD_GET’ [-Werror=implicit-function-declaration] 184 | if (FIELD_GET(MON_FAULT_STATUS_MASK, val) == MON_FAULT_LVL1_UPR) | ^~~~~~~~~ cc1: all warnings being treated as errors Fixes: cbe31d5ce498 ("thermal/drivers/armada: Use bitfield and bitmask macros") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202608082242.drjXuzsN-lkp@intel.com/ Signed-off-by: Daniel Lezcano <daniel.lezcano@oss.qualcomm.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://patch.msgid.link/20260811094747.2940616-1-daniel.lezcano@kernel.org
2026-08-18thermal/drivers/qcom/spm mbg tm: Fix missing bitfield headerDaniel Lezcano1-1/+1
Add missing bitfield header leading to the error: >> drivers/thermal/qcom/qcom-spmi-mbg-tm.c:184:21: error: implicit declaration of function 'FIELD_GET' [-Wimplicit-function-declaration] 184 | if (FIELD_GET(MON_FAULT_STATUS_MASK, val) == MON_FAULT_LVL1_UPR) | ^~~~~~~~~ Fixes: c3dce117333c ("thermal/drivers/qcom: Add support for Qualcomm MBG thermal monitoring") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202608080800.RfxKb9uR-lkp@intel.com/ Signed-off-by: Daniel Lezcano <daniel.lezcano@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://patch.msgid.link/20260811094935.2941313-1-daniel.lezcano@kernel.org
2026-08-18thermal/drivers/qcom: Fix missing spmi adc tm5 gen3 fileJishnu Prakash1-0/+434
Add missing file resulting from a manual application of the change below after fixing a conflict in the Makefile. Fixes: 948ee3a74f35 ("thermal/drivers/qcom: add support for PMIC5 Gen3 ADC thermal monitoring") Signed-off-by: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://patch.msgid.link/20260811145427.3089426-1-daniel.lezcano@kernel.org
2026-08-18platform/x86: panasonic-laptop: Fix sentinel write past pcc->sinf[]Hilgad Montelo1-1/+10
acpi_pcc_retrieve_biosdata() rejects SINF packages only when pcc->num_sifr is strictly less than hkey->package.count, then unconditionally writes a trailing sentinel at pcc->sinf[hkey->package.count]. But pcc->sinf[] is allocated with exactly pcc->num_sifr elements (valid indices 0..num_sifr-1), so that write needs num_sifr strictly greater than package.count to stay in bounds -- num_sifr == package.count passes the existing check but still overflows by one element. This is exactly the case probe()'s existing num_sifr++ workaround ("Some DSDT-s have an off-by-one bug where the SINF package count is one higher than the SQTY reported value") is written to accommodate: when a DSDT's SINF package count equals SQTY+1, the workaround makes num_sifr equal to package.count, which is precisely the boundary that overflows here. Found via UBSan (array-index-out-of-bounds) on hardware where HKEY.SQTY returns 37 and HKEY.SINF()'s package has 38 elements: num_sifr becomes 38 after the += 1 workaround, the loop correctly fills indices 0..37, and the sentinel write then targets index 38, one past the end -- a silent 4-byte heap overflow on kernels without CONFIG_UBSAN. Tightening the rejection check to num_sifr <= package.count would avoid the overflow but breaks probe() entirely on exactly this hardware, since num_sifr == package.count is the case the off-by-one workaround exists to support. Nothing else in the driver reads this sentinel value back, so simply skip the write when there is no room for it instead. Fixes: a3d0dbd18ce9 ("platform/x86: panasonic-laptop: simplify allocation of sinf") Cc: stable@vger.kernel.org Signed-off-by: Hilgad Montelo <hilgad.montelo@gmail.com> Link: https://patch.msgid.link/20260813221744.25668-4-hilgad.montelo@gmail.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2026-08-18platform/x86: dell-wmi-sysman: Fix instance ID boundsHyeongJun An1-1/+1
The get_instance_id() macro walks the per-type attribute array with 'i <= instances_count'. Each array is allocated with exactly instances_count entries, so the valid range is [0, instances_count) and the last iteration reads one element past the end. On a name miss that out-of-bounds attribute_name is handed to strcmp(), which reads on until it finds a NUL byte. Every kobject in these ksets is built from an entry that was populated, so a miss does not look reachable from sysfs today. The bound is wrong either way and the read is out of bounds. The matching macro in hp-bioscfg carried the same off-by-one and was corrected by commit 25150715e0b0 ("platform/x86: hp-bioscfg: Fix kernel panic in GET_INSTANCE_ID macro"). That macro takes a kobject pointer out of the out-of-bounds element and dereferences it, so it could fault. This one reads a char array. Use '<' to match the allocation. Fixes: e8a60aa7404b ("platform/x86: Introduce support for Systems Management Driver over WMI for Dell Systems") Assisted-by: Claude:claude-opus-5 Signed-off-by: HyeongJun An <sammiee5311@gmail.com> Link: https://patch.msgid.link/20260814132535.4169956-1-sammiee5311@gmail.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2026-08-18platform/x86: asus-armoury: add support for FX517ZRAbdElRahman Soliman1-0/+26
Add DMI match and power-limit table entry for the ASUS TUF Dash F15 (2022), board FX517ZR, an Alder Lake + RTX 3070 laptop. AC and DC min/max values for ppt_pl1_spl, ppt_pl2_sppt, nv_dynamic_boost and nv_temp_target were referenced from ASUS Armoury Crate's manual performance-tuning mode on Windows for this exact model. Assisted-by: Claude:claude-sonnet-5 Signed-off-by: AbdElRahman Soliman <abdelrahman7987@gmail.com> Link: https://patch.msgid.link/20260816174118.28012-1-abdelrahman7987@gmail.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2026-08-18platform/x86: hp-wmi: Add OMEN board 8D88 thermal profile supportSuryansh Singh1-0/+4
The HP OMEN 16 (board ID: 8D88) supports the existing OMEN thermal profile handling. Add the DMI board name to hp_wmi_feature_boards[] so that the existing thermal profile support is enabled for this board. This enables the existing fan control and platform profile handling for 8D88. The board has been reported as working with this configuration in OmenCtl. Link: https://github.com/yunusemreyl/OmenCtl/commit/e3cde3842bb2ffbd697592dc08a6043dc7cccfd0 Signed-off-by: Suryansh Singh <technosfan14@gmail.com> Link: https://patch.msgid.link/20260818090828.27049-1-technosfan14@gmail.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2026-08-18platform/x86: hp-wmi: Add OMEN board 8A43 thermal profile supportSuryansh Singh1-1/+1
The HP OMEN 16-n0xxx AMD (board ID: 8A43) supports the existing OMEN thermal profile handling. Add the DMI board name to omen_thermal_profile_boards[] so that the existing thermal profile support is enabled for this board. This enables the existing fan control and platform profile handling for 8A43. The board has been reported as working with this configuration in OmenCtl. Link: https://github.com/yunusemreyl/OmenCtl/commit/39d03b62028555d3014085f0d9cb3eb57a501871 Signed-off-by: Suryansh Singh <technosfan14@gmail.com> Link: https://patch.msgid.link/20260818082925.14854-1-technosfan14@gmail.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2026-08-18platform/x86: hp-wmi: Add OMEN Transcend 16 8BB3 supportSuryansh Singh1-0/+4
The HP OMEN Transcend 16 (board ID: 8BB3) uses the existing OMEN v1 WMI interface but does not use the standard EC thermal profile parameters. Add the DMI board name to hp_wmi_feature_boards[] and map it to omen_v1_no_ec_board_params. This enables the existing board-specific handling for 8BB3, including platform profile and fan control support. Tested on: HP OMEN Transcend 16-u0xxx DMI Board Name: 8BB3 Platform profile registration, fan RPM reporting, and PWM fan control have been verified on this board. Link: https://github.com/arfelious/omen-fan-control/commit/5d7a893432f1075ebb030a4eccdc929c35d68d97 Signed-off-by: Suryansh Singh <technosfan14@gmail.com> Link: https://patch.msgid.link/20260817145206.148600-1-technosfan14@gmail.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2026-08-18platform/x86: hp-wmi: Add OMEN board 8BAA thermal profile supportSuryansh Singh1-0/+4
The HP OMEN 16-wf0xxx (board ID: 8BAA) has the same WMI interface as other OMEN boards and is compatible with the existing omen_v1_board_params. Add the DMI board name to hp_wmi_feature_boards[] table and map it to omen_v1_board_params. Without this entry, platform profile switching is unavailable, preventing fan RPM reporting and controlling. Tested on: HP OMEN 16-wf0xxx DMI Board Name: 8BAA It has been confirmed that the platform profile is registered successfully, and the fan RPMs are readable and controllable. Link: https://www.reddit.com/r/HPOmen/comments/1siukdu/guide_native_fan_control_on_hp_omen_16wfx0xxx/ Signed-off-by: Suryansh Singh <technosfan14@gmail.com> Link: https://patch.msgid.link/20260817121233.44636-1-technosfan14@gmail.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2026-08-188139cp: fix Rx and Tx not being disabled in cp_suspendKarl Mehltretter1-1/+1
On QEMU rtl8139 model, frames that arrive while the interface is suspended still end up in the stack after resume. With pm_test=devices, which keeps devices suspended for 5s, 200 frames sent to interface during that time and 50 frames after resume, eth0 reports 113 received frames. cp_suspend() is supposed to stop receiver and the transmitter, but the mask is wrong: (~RxOn | ~TxOn) is ~0, nothing is cleared and Cmd still reads 0x0d when cp_suspend() returns. Use ~(RxOn | TxOn) so both bits are actually cleared. Fixes: 1da177e4c3f4 ("Linux-2.6.12-rc2") Signed-off-by: Karl Mehltretter <kmehltretter@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/20260817043057.20099-1-kmehltretter@gmail.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2026-08-18vxlan: mdb: Fix use-after-free in vxlan_mdb_flush()Baul Lee1-3/+6
vxlan_mdb_flush() iterates over the MDB entries using hlist_for_each_entry_safe(), which only tolerates the removal of the current entry. Contrary to the comment above the loop, the removal of an entry can trigger the removal of another entry. Flushing the remotes of a (*, G) entry also removes the (S, G) entries that were created for its source list, once they are left without remotes: vxlan_mdb_remotes_flush() -> vxlan_mdb_remote_del() -> vxlan_mdb_remote_srcs_del() -> vxlan_mdb_remote_src_del() -> vxlan_mdb_remote_src_fwd_del() -> __vxlan_mdb_del() -> vxlan_mdb_entry_put() Such an entry can be located after the (*, G) entry in the list, as vxlan_mdb_entry_get() returns an existing entry without moving it to the head of the list. This order is obtained by adding the (S, G) entry before the (*, G) entry, the latter with NLM_F_REPLACE, as the addition of the source otherwise fails with -EEXIST. The (S, G) entry is then the entry saved by hlist_for_each_entry_safe() and it is freed while the (*, G) entry is processed. The next iteration calls hlist_del() on it again, writing LIST_POISON1 to LIST_POISON2 [1]. Besides device deletion, the flush is also reachable from RTM_DELMDB with NLM_F_BULK. Fix by re-reading the next entry after the remotes were flushed. The current entry cannot be removed by this flush, as source lists can only be configured on (*, G) entries and the removed entries are (S, G) entries. It is therefore still linked and its next pointer reflects the removals. [1] BUG: KASAN: wild-memory-access in vxlan_mdb_entry_put.part.0+0x328/0x588 Write of size 8 at addr dead000000000122 by task ip/327 CPU: 3 UID: 1000 PID: 327 Comm: ip Not tainted 7.2.0-rc7 #2 PREEMPT Call trace: vxlan_mdb_entry_put.part.0+0x328/0x588 vxlan_mdb_flush+0x1d8/0x25c vxlan_mdb_fini+0x8c/0x100 vxlan_uninit+0x1c/0x7c unregister_netdevice_many_notify+0x954/0xd4c rtnl_dellink+0x210/0x530 rtnetlink_rcv_msg+0x434/0x4d0 netlink_rcv_skb+0xc4/0x204 rtnetlink_rcv+0x18/0x24 netlink_unicast+0x4b8/0x548 netlink_sendmsg+0x29c/0x560 ____sys_sendmsg+0x390/0x3ec ___sys_sendmsg+0x114/0x188 __sys_sendmsg+0xf0/0x178 __arm64_sys_sendmsg+0x48/0x60 invoke_syscall.constprop.0+0x58/0x180 el0_svc_common.constprop.0+0x74/0x140 do_el0_svc+0x30/0x40 el0_svc+0x38/0x98 el0t_64_sync_handler+0xa0/0xe4 el0t_64_sync+0x198/0x19c Fixes: a3a48de5eade ("vxlan: mdb: Add MDB control path support") Signed-off-by: Baul Lee <baul.lee@xbow.com> Reviewed-by: Nikolay Aleksandrov <razor@blackwall.org> Reviewed-by: Ido Schimmel <idosch@nvidia.com> Link: https://patch.msgid.link/20260814153547.29567-1-baul.lee@xbow.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2026-08-18parisc: eisa: Fix infinite loop when parsing invalid IRQ valuePei Xiao1-0/+5
When an invalid value is passed via the "eisa_irq_edge=" kernel command line parameter (e.g. "eisa_irq_edge=16,5"), eisa_irq_setup() prints an error message and continues without advancing the current position. As a result the same invalid value is parsed again and again, causing an infinite loop while the kernel boots. Advance to the next comma-separated entry, or stop parsing when there is no next entry, before continuing so that the remaining entries are processed normally. Signed-off-by: Pei Xiao <xiaopei01@kylinos.cn> Cc: stable@vger.kernel.org Signed-off-by: Helge Deller <deller@gmx.de>
2026-08-18soc: qcom: make QCOM_PDR_MSG selectableArnd Bergmann1-3/+3
Selecting QCOM_PDR_HELPERS from outside of a CONFIG_QCOM_SOC block causes a build warning: WARNING: unmet direct dependencies detected for QCOM_PDR_MSG Depends on [n]: QCOM_SOC [=n] Selected by [y]: - QCOM_PDR_HELPERS [=y] && NET [=y] Avoid this by allowing QCOM_PDR_MSG to be selected as well. Fixes: f2866e6a27f7 ("soc: qcom: Hide all drivers behind selectable menu") Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-08-18soc: qcom: ubwc: Fix link error when QCOM_SMEM=nDaniel Baluta1-0/+1
ubwc_config.c calls qcom_smem_is_available() and qcom_smem_dram_get_hbb() unconditionally, so QCOM_UBWC_CONFIG=y with QCOM_SMEM=n fails to link: arm-linux-gnueabihf-ld: ubwc_config.c:(.text+0x2c): undefined reference to 'qcom_smem_is_available' Add the missing 'depends on QCOM_SMEM'. Fixes: 1b445022d1d0 ("soc: qcom: ubwc: Get HBB from SMEM") Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com> Tested-by: Nathan Chancellor <nathan@kernel.org> # build Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-08-18media: iris: Guard the QCOM_UBWC_CONFIG select with QCOM_SMEMDaniel Baluta1-1/+2
QCOM_UBWC_CONFIG is about to depend on QCOM_SMEM. Guard the VIDEO_QCOM_IRIS select with 'if ARCH_QCOM && QCOM_SMEM', and add 'depends on QCOM_SMEM || QCOM_SMEM=n' so a built-in driver is never selected against a missing or modular SMEM. Fixes: c43207553867 ("media: iris: retrieve UBWC platform configuration") Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com> Tested-by: Nathan Chancellor <nathan@kernel.org> # build Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-08-18drm/msm: Guard the QCOM_UBWC_CONFIG select with QCOM_SMEMDaniel Baluta1-1/+2
QCOM_UBWC_CONFIG is about to depend on QCOM_SMEM. Guard the DRM_MSM select with 'if ARCH_QCOM && QCOM_SMEM', and add 'depends on QCOM_SMEM || QCOM_SMEM=n' so a built-in driver is never selected against a missing or modular SMEM. Fixes: 1b445022d1d0 ("soc: qcom: ubwc: Get HBB from SMEM") Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Acked-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com> Tested-by: Nathan Chancellor <nathan@kernel.org> # build Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-08-18Merge tag 'asoc-v7.3' of ↵Takashi Iwai2-4/+4
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus ASoC: Updates for v7.3 A very busy release, a combination of a lot of new device work and more people than usual doing various subsystem wide improvements in the code. The main subsystem level change is the work Morimoto-san has been doing to get automatic DAI format selection more widely deployed, and even that is largely changes in the drivers to enable use of the feature rather than framework work. - Conversions of a lot of drivers to use the automatic DAI format selection code from Morimoto-san. - Many fixes and code improvements from bui duc phuc and Morimoto-san. - Fixes for ordering problems in register default tables from Peter Ujfalusi. - Changes to use auto-cleanup for firmware to improve robustness from Takashi Iwai. - Support for firmware on more Awinc devices. - Many changes in the Qualcomm driver stack, mostly around new platform support. - Support for AMD ACP7.B/F, Cirrus Logic CS35L62, Loongson 2K0300, Meson GX formatter and interface, Qualcomm LPI MI2S, SM8475 and WSA855 and Realtek RT1321 VA1/2 and RT766/7.
2026-08-17Merge tag 'libcrypto-updates-for-linus' of ↵Linus Torvalds1-4/+3
git://git.kernel.org/pub/scm/linux/kernel/git/ebiggers/linux Pull crypto library updates from Eric Biggers: "Add library APIs for most AES encryption modes that are used in the kernel (ECB, CBC, CBC-CTS, CTR, XCTR, XTS, GCM, CCM). These AES modes have many in-kernel users that are currently using the crypto_skcipher or crypto_aead APIs. These existing APIs are difficult to use and inefficient. Until now, the lack of proper library support for these has been the main gap in the crypto library. This set of changes is the next stage of addressing it: - Implement the new APIs on top of the existing support for single-block AES in the library. - Fully document the new APIs. - Migrate the only user of the old AES-GCM library API to the new, more flexible API; then remove the old API and its implementation. - Wire up the new APIs to the traditional crypto API by adding crypto_skcipher and crypto_aead algorithms. This makes the new APIs be covered by the traditional crypto API's self-tests. It also makes them be already used for real on systems that don't have architecture-optimized code for these modes. But most importantly, this is a prerequisite for migrating the architecture-optimized code for these AES modes (i.e. arch/*/crypto/aes*) into the library, which as usual will eliminate a lot of redundant "glue" code. Note that unlike some of the other algorithms that have been migrated to the library, e.g. SHA-512, for these AES modes there was too much to get done in one cycle. Nor did it make sense to handle these modes one at a time, because they tend to be coupled together or depend on each other, especially in the architecture-optimized AES code. Thus, most of the benefits (reductions in lines of code, performance improvements, etc.) will follow in later cycles when architecture-optimized code is migrated into the library and users of crypto_skcipher and crypto_aead are updated to use the new APIs. The design of the new APIs was informed by writing proof-of-concept patches for many kernel subsystems currently accessing these same algorithms via crypto_skcipher or crypto_aead (patches 18-33 of https://lore.kernel.org/r/20260707053503.209874-1-ebiggers@kernel.org/). While those patches will be resent for real later, the total diffstat for them was negative 1905 lines. So clearly the new APIs are quite a bit easier to use and align better with what users actually need. Besides the new AES encryption APIs, there are also a few changes for improved AES-CMAC key and context zeroization" * tag 'libcrypto-updates-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ebiggers/linux: mac80211: fils_aead: Use __cleanup() instead of memzero_explicit() Bluetooth: SMP: clear the aes_cmac_key when done smb: clear the aes_cmac_key and aes_cmac_ctx when done lib/crypto: aes-cmac: Add zeroization functions lib/crypto: aesgcm: Remove old AES-GCM library x86/sev: Remove obsolete virtual address check x86/sev: Use new AES-GCM library crypto: aes - Add CCM support using library crypto: aes - Add GCM support using library crypto: aes - Add XTS support using library crypto: aes - Add CTR and XCTR support using library crypto: aes - Add CBC and CBC-CTS support using library crypto: aes - Add ECB support using library lib/crypto: aes: Add CCM support lib/crypto: aes: Add GCM support lib/crypto: aes: Add XTS support lib/crypto: aes: Add CTR and XCTR support lib/crypto: aes: Add CBC and CBC-CTS support lib/crypto: aes: Add ECB support crypto: xts - Split out __xts_verify_key() helper
2026-08-17Merge tag 'fscrypt-for-linus' of git://git.kernel.org/pub/scm/fs/fscrypt/linuxLinus Torvalds1-1/+2
Pull fscrypt updates from Eric Biggers: "The main change this cycle is a significant simplification that's been overdue for a while now: standardizing on a single file contents encryption implementation in ext4 and f2fs, instead of having two. Specifically, the original filesystem-layer file contents encryption implementation is removed, and the blk-crypto implementation is now used unconditionally. blk-crypto delegates either to inline crypto hardware or to the CPU via blk-crypto-fallback. The latter is functionally equivalent to the original filesystem-layer code. The blk-crypto implementation already existed, but previously it was used only when the filesystem was mounted with "-o inlinecrypt". Now, "-o inlinecrypt" just selects whether inline crypto hardware is used. To allow maintaining that user control over hardware use, the blk-crypto API is extended with a new flag BLK_CRYPTO_CFG_ALLOW_HW. Overall, this removes quite a bit of redundant code from ext4, f2fs, and fs/crypto/. It should make things easier for ongoing filesystem efforts such as iomap support, large folios, and btrfs encryption (btrfs had already been planning to use blk-crypto exclusively.) There are two small behavior changes of note: - Direct I/O now works on encrypted files even without "-o inlinecrypt", rather than falling back to buffered I/O. This is effectively a bugfix, though I'll continue to keep an eye out for any user that may have been depending on the buffered I/O fallback. - IV_INO_LBLK_32 policies are no longer supported in certain cases that didn't make sense and have no known uses. This has been in linux-next since July 22 with no reported issues. All encryption xfstests pass on ext4 and f2fs. As usual I've also been using it on a system with an fscrypt-encrypted home directory. Of course, the blk-crypto code paths also aren't new and were already being used on many systems via the inlinecrypt mount option. In addition to the main change described above, there are a few other cleanups such as using lock guards for mutexes, improving documentation, and removing a workaround for outdated gcc versions" * tag 'fscrypt-for-linus' of git://git.kernel.org/pub/scm/fs/fscrypt/linux: (29 commits) blk-crypto: Update docs for blk-crypto-fallback motivation blk-crypto: Remove unused function blk_crypto_config_supported() fscrypt: Update docs for data path fscrypt: Remove unused function fscrypt_finalize_bounce_page() f2fs: Update outdated comment in f2fs_write_begin() fs: Update outdated comment for SB_INLINECRYPT fscrypt: Update encryption policy version docs fscrypt: Replace some variable-size memsets with fixed-size fscrypt: Add safety checks to non-block-based en/decryption fscrypt: Merge bio.c and inline_crypt.c into block.c fscrypt: Remove unused functions and workqueue fscrypt: Remove fs-layer zeroout code fscrypt: Remove fscrypt_dio_supported() fscrypt: Replace calls to fscrypt_inode_uses_inline_crypto() fs/buffer: Remove fs-layer decryption code f2fs: Remove fs-layer file contents en/decryption code ext4: Further de-generalize the bio postprocessing code ext4: Make ext4_bio_write_folio() return void ext4: Remove fs-layer file contents en/decryption code Documentation: fscrypt: Update docs for inlinecrypt ...
2026-08-17net/mlx5: HWS, Remove redundant FW command when reading capsYevgeny Kliteynik1-6/+0
Remove redundant FW query that isn't really in use. Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Erez Shitrit <erezsh@nvidia.com> Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Link: https://patch.msgid.link/20260816142045.3289452-6-tariqt@nvidia.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-08-17net/mlx5: HWS, Remove redundant MLX5_SET in RTC creationYevgeny Kliteynik1-1/+0
Remove duplicated setting of field in mlx5hws_cmd_rtc_create(). Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Erez Shitrit <erezsh@nvidia.com> Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Link: https://patch.msgid.link/20260816142045.3289452-5-tariqt@nvidia.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-08-17net/mlx5: HWS, Set the num of queues only when alloc succeededYevgeny Kliteynik1-2/+2
When initializing send queues, set the number of queues only when allocations are over. Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Erez Shitrit <erezsh@nvidia.com> Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Link: https://patch.msgid.link/20260816142045.3289452-4-tariqt@nvidia.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-08-17net/mlx5: HWS, Log syndrome on STC modify failureYevgeny Kliteynik1-3/+5
When mlx5_cmd_exec fails for STC modify, include the command syndrome from the output buffer in the error message to aid debugging. Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Erez Shitrit <erezsh@nvidia.com> Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Link: https://patch.msgid.link/20260816142045.3289452-3-tariqt@nvidia.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-08-17net/mlx5: HWS, Print more details for bad completionYevgeny Kliteynik1-19/+44
When polling for completion returned completion with error, parse some more details: WQE count and syndrome number. Also, extract all the long value-to-string if conditions to a short value-to-string functions: do it for rule resize state, rule status, and syndrome. v2: removed duplicated QPN print Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Reviewed-by: Erez Shitrit <erezsh@nvidia.com> Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Link: https://patch.msgid.link/20260816142045.3289452-2-tariqt@nvidia.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-08-17gve: add a few helper functions to set device propertiesHarshitha Ramamurthy3-32/+62
For the mailbox ABI, device properties will come from a different source compared to the AdminQ mode. To accommodate the new source when the mailbox ABI is added, add a few helper functions to set a few device properties. Those functions are: - gve_set_queue_properties() to set no. of pages for QPL mode and number of queues in general - gve_set_mtu() - gve_set_mac() This is just code movement, no functional change. Reviewed-by: Willem de Bruijn <willemb@google.com> Reviewed-by: Jordan Rhee <jordanrhee@google.com> Signed-off-by: Harshitha Ramamurthy <hramamurthy@google.com> Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@intel.com> Link: https://patch.msgid.link/20260814021406.3044324-4-hramamurthy@google.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-08-17gve: refactor initialization with helper functionsHarshitha Ramamurthy3-47/+62
In the interest of commonizing code, refactor gve_probe() and gve_init_priv() with a few helper functions that can be expanded and utilized in upcoming patches that add the mailbox ABI to the driver. The helper functions are: - gve_set_num_ntfy_blks() - gve_set_num_queues() Reorder code to combine lines that accomplish a similar objective like setting defaults. Move setting HW-GRO and UDP GSO support out of an Adminq method into gve_init_priv(). These changes are just code movement, no functional change. Reviewed-by: Willem de Bruijn <willemb@google.com> Reviewed-by: Jordan Rhee <jordanrhee@google.com> Signed-off-by: Harshitha Ramamurthy <hramamurthy@google.com> Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@intel.com> Link: https://patch.msgid.link/20260814021406.3044324-3-hramamurthy@google.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-08-17gve: don't pass in unused parameter to gve_adminq_freeHarshitha Ramamurthy3-4/+4
Clean up gve_adminq_free to not take in an unused parameter. Reviewed-by: Willem de Bruijn <willemb@google.com> Reviewed-by: Jordan Rhee <jordanrhee@google.com> Signed-off-by: Harshitha Ramamurthy <hramamurthy@google.com> Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@intel.com> Link: https://patch.msgid.link/20260814021406.3044324-2-hramamurthy@google.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-08-17net: dsa: realtek: use gpiod_set_value_cansleep for reset GPIOAhmad Fatoum1-2/+2
rtl83xx_reset_assert() and rtl83xx_reset_deassert() are only called from the probe path, which may sleep and is not timing-critical. When the reset GPIO is provided by a sleeping controller such as an I2C I/O expander, gpiod_set_value() warns: WARNING: drivers/gpio/gpiolib.c:4030 at gpiod_set_value+0x44/0x80, CPU#1: kworker/u16:4/61 Hardware name: B&O MAP CA33 Rev f (UNKNOWN) (DT) Workqueue: events_unbound deferred_probe_work_func pc : gpiod_set_value+0x44/0x80 lr : rtl83xx_probe+0x1d8/0x3a0 Call trace: gpiod_set_value+0x44/0x80 (P) rtl83xx_probe+0x1d8/0x3a0 realtek_mdio_probe+0x24/0xa0 mdio_probe+0x38/0x78 really_probe+0xc4/0x3e0 __driver_probe_device+0x15c/0x1b8 driver_probe_device+0xb4/0x120 __device_attach_driver+0xb8/0x1a0 bus_for_each_drv+0x88/0xf0 __device_attach+0xa0/0x1d8 device_initial_probe+0x54/0x68 bus_probe_device+0x38/0xa0 deferred_probe_work_func+0xb8/0x120 process_one_work+0x184/0x4e8 worker_thread+0x188/0x308 kthread+0x130/0x150 ret_from_fork+0x10/0x20 Switch both helpers to gpiod_set_value_cansleep() so such a reset GPIO can be used without triggering the warning. The reset GPIO has been driven with the non-sleeping gpiod_set_value() since the driver was added in v4.19. The call has since been refactored across several files - from realtek-smi.c / realtek-mdio.c into the common rtl83xx.c module and then into the rtl83xx_reset_assert() and rtl83xx_reset_deassert() helpers (both in v6.9). This patch therefore applies as-is only to kernels that carry those helpers (v6.9+); older stable kernels need the same gpiod_set_value_cansleep() conversion at the corresponding open-coded call sites. Fixes: d8652956cf37 ("net: dsa: realtek-smi: Add Realtek SMI driver") Cc: <stable@vger.kernel.org> # 6.9.x Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Co-developed-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Alvin Šipraga <alvin.sipraga@analog.com> Reviewed-by: Linus Walleij <linusw@kernel.org> Reviewed-by: Luiz Angelo Daros de Luca <luizluca@gmail.com> Link: https://patch.msgid.link/20260814110102.2362246-1-o.rempel@pengutronix.de Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-08-17Merge branch '200GbE' of ↵Jakub Kicinski53-5166/+3792
git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue Tony Nguyen says: ==================== Introduce iXD driver Larysa Zaremba says: This patch series adds the iXD driver, which supports the Intel(R) Control Plane PCI Function on Intel E2100 and later IPUs and FNICs. It facilitates a centralized control over multiple IDPF PFs/VFs/SFs exposed by the same card. The reason for the separation is to be able to offload the control plane to the host different from where the data plane is running. This is the first phase in the release of this driver where we implement the initialization of the core PCI driver. Subsequent phases will implement advanced features like usage of idpf ethernet aux device, link management, NVM update via devlink, switchdev port representors, data and exception path, flow rule programming, etc. The first phase entails the following aspects: 1. Additional libie functionalities: Patches 1-5 introduce additional common library API for drivers to communicate with the control plane through mailbox communication. A control queue is a hardware interface which is used by the driver to interact with other subsystems (like firmware). The library APIs allow the driver to setup and configure the control queues to send and receive virtchnl messages. The library has an internal bookkeeping (XN API) mechanism to keep track of the send messages. It supports both synchronous as well as asynchronous way of handling the messages. The library also handles the timeout internally for synchronous messages using events. This reduces the driver's overhead in handling the timeout error cases. The current patch series supports only APIs that are needed for device initialization. These include APIs in the libie_pci module: * Allocating/freeing the DMA memory and mapping the MMIO regions for BAR0, read/write APIs for drivers to access the MMIO memory and libie_cp module: * Control queue initialization and configuration * Transport initialization for bookkeeping * Blocking and asynchronous mailbox transactions Once the mailbox is initialized, the drivers can send and receive virtchnl messages to/from the control plane. The modules above are not supposed to be linked with the main libie library, but do share the folder with it. 2. idpf: Patches 6-11 refactor the idpf driver to use the libie APIs for control queue configuration, virtchnl transaction, device initialization and reset and adjust related code accordingly. 3. ixd: Patches 12-15 add the ixd driver and implement multiple pieces of the initialization flow as follows: * Add the ability to load * A reset is issued to ensure a clean device state, followed by initialization of the mailbox * Device capabilities: As part of initialization, the driver has to determine what the device is capable of (ex. max queues, vports, etc). This information is obtained from the firmware and stored by the driver. * Enable initial support for the devlink interface * '200GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue: ixd: add devlink support ixd: add the core initialization ixd: add reset checks and initialize the mailbox ixd: add basic driver framework for Intel(R) Control Plane Function idpf: print a debug message and bail in case of non-event ctlq message idpf: make mbx_task queueing and cancelling more consistent idpf: refactor idpf to use libie control queues idpf: refactor idpf to use libie_pci APIs idpf: remove unused code for getting RSS info from device idpf: remove 'vport_params_reqd' field libie: add bookkeeping support for control queue messages libie: add control queue support libeth: allow to create fill queues without NAPI libie: add PCI device initialization helpers to libie virtchnl: move virtchnl and virtchnl2 headers to 'include/linux/net/intel' ==================== Link: https://patch.msgid.link/20260812212532.905873-1-anthony.l.nguyen@intel.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-08-17enic: re-establish V2 VF admin channel and PF registration after resetSatish Kharat1-40/+82
The reset paths (enic_reset/enic_tx_hang_reset) tore down and re-opened the V2 admin/MBOX channel only for the PF: the close/reopen was gated on enic_sriov_enabled() && vf_type == ENIC_VF_TYPE_V2, which is never true on a VF (vf_type is set only on the PF; VFs are identified by enic_is_sriov_vf_v2()). A VF-initiated reset therefore left the VF admin QP wiped by the reset but never re-opened, and the VF never re-registered with the PF, so VF<->PF MBOX traffic (currently link state) stopped working until the VF was re-probed. Factor the decision into enic_has_admin_chan() (true for a V2 PF while SR-IOV is enabled and for every V2 VF) and the reopen sequence into enic_admin_chan_reopen(). For a VF the helper additionally re-runs the probe-time handshake (enic_mbox_vf_capability_check() + enic_mbox_vf_register()) so the PF learns about the VF again; for a PF it re-pushes the current link state as before. Before reopening, invalidate the VF's local registration flag. The reset only wipes the VF's admin QP, not the PF's software vf_state (that changes only via the register/unregister MBOX handlers), so the PF may still hold a stale "registered" until the VF re-registers. Locally, a failed reopen or re-handshake must not leave a stale registered state that a later teardown would try to unregister over a dead channel. Signed-off-by: Satish Kharat <satishkh@cisco.com> Link: https://patch.msgid.link/20260812-enic-sriov-v2-admin-channel-v2-v13-11-b3809e448aba@cisco.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-08-17enic: add V2 VF probe with admin channel and PF registrationSatish Kharat2-11/+86
When a V2 SR-IOV VF probes, initialize the MBOX protocol, open the admin channel, perform the capability check with the PF, and register with the PF. This establishes the PF-VF communication path that the PF uses to send link state notifications. The admin channel and MBOX registration happen after enic_dev_init() (which discovers admin channel resources) and before register_netdev() so the VF is fully initialized before the interface is visible to userspace. A V2 VF whose firmware did not provision admin WQ/RQ/CQ resources fails probe with -ENODEV from enic_admin_channel_open(); the admin channel is a hard requirement for V2 VFs. enic_mbox_init() installs the receive handler and resets the message sequence number before enic_admin_channel_open() unmasks the admin interrupt, so a completion can never arrive before the handler is in place. On remove, the VF unregisters from the PF and closes its admin channel before tearing down data path resources. V2 VFs are not provisioned with an RES_TYPE_SRIOV_INTR resource by firmware, so bypass that check in the admin channel capability detection for V2 VFs. The PF still requires this resource. The admin MSI-X vector reserved by enic_set_intr_mode() is used for the admin channel interrupt. enic_adjust_resources() ensures the reserved slot is within intr_avail bounds even at maximum queue configurations. The admin INTR uses a RES_TYPE_INTR_CTRL slot shared with the data path. Signed-off-by: Satish Kharat <satishkh@cisco.com> Link: https://patch.msgid.link/20260812-enic-sriov-v2-admin-channel-v2-v13-10-b3809e448aba@cisco.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-08-17enic: wire V2 SR-IOV enable with admin channel and MBOXSatish Kharat7-16/+301
Extend enic_sriov_configure() to handle V2 SR-IOV VFs. When the PF detects V2 VF device IDs, the enable path allocates per-VF MBOX state, initializes the MBOX protocol, opens the admin channel, and then calls pci_enable_sriov(). The admin channel must be ready before VFs are created so that VF drivers can immediately begin the MBOX capability and registration handshake during their probe. The enic_sriov_configure() dispatcher and its V2 helpers (enic_sriov_v2_enable, enic_sriov_v2_disable) are defined here but intentionally not yet wired into struct pci_driver via .sriov_configure -- hence the __maybe_unused annotations. This series introduces only the admin channel and MBOX infrastructure; sysfs-driven V2 enable/disable will be activated in a follow-up patch by adding ".sriov_configure = enic_sriov_configure," to enic_driver. Because .sriov_configure is not registered yet, enic_sriov_configure() cannot run concurrently with the rtnl-protected reset paths (enic_reset(), enic_tx_hang_reset()) in this series, so there is no reachable locking race between SR-IOV enable/disable and reset. The follow-up patch that wires the callback will add the necessary serialization against those paths. Note that simply taking rtnl_lock() around the enable path is not viable, because pci_enable_sriov() triggers VF probe and register_netdev(), which themselves acquire rtnl; the wiring patch therefore uses finer-grained serialization. The disable path first clears ENIC_SRIOV_ENABLED and flushes the link-notify work, so no further VF link-state broadcast can run, then calls pci_disable_sriov() (VF drivers unregister via MBOX), closes the admin channel, and frees per-VF state. Clearing the flag and flushing the work before vf_state is freed closes a use-after-free window against the link-notify path. Notify registered VFs of PF link transitions: enic_link_check() schedules link_notify_work on each carrier up/down edge, and the work handler sends PF_LINK_STATE_NOTIF to the VFs from process context. The broadcast cannot run directly in enic_link_check() because the MBOX send path may sleep and link check runs in the notify timer/ISR context. On a V2 VF the admin-channel (PF) link-state notification is the sole authority for carrier state, so enic_link_check() returns early for such VFs. As a side effect the VF retains the firmware-provided static Rx interrupt coalescing (config.intr_timer_usec) rather than PF-driven speed-adaptive coalescing; this is intentional, as adaptive Rx coalescing is a PF-only responsibility for V2 VFs. Re-establish the admin/MBOX channel across a PF reset. enic_reset() and enic_tx_hang_reset() fully close the admin channel before the soft/hang reset (which wipes all hardware queues, including the admin WQ/RQ), then reopen it and re-run enic_mbox_init() after the data path is back up, and re-push the current link state to registered VFs. Reject VF port profile requests when V2 SR-IOV is active (enic_is_valid_pp_vf), since enic->pp is not reallocated for V2 VFs and the V2 protocol uses MBOX instead of port profiles. Update enic_remove() to run enic_dev_deinit() and vnic_dev_close() after SR-IOV teardown, so the PF device remains functional while VFs are being cleaned up. This ordering applies to both V1 and V2 SR-IOV paths. Restrict the probe-time SR-IOV auto-enable to the legacy VF types (V1 and usNIC). A V2-capable adapter whose firmware lacks V2 support is downgraded to ENIC_VF_TYPE_NONE, and V2 VFs require the admin channel which is only brought up via sysfs enic_sriov_configure(); neither must be auto-enabled through the legacy pci_enable_sriov() path at probe. Signed-off-by: Satish Kharat <satishkh@cisco.com> Link: https://patch.msgid.link/20260812-enic-sriov-v2-admin-channel-v2-v13-9-b3809e448aba@cisco.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-08-17enic: add MBOX VF handlers for capability, register and link stateSatish Kharat3-1/+291
Implement VF-side mailbox message processing for SR-IOV V2 admin channel communication. VF receive handlers: - VF_CAPABILITY_REPLY: store PF protocol version, signal completion - VF_REGISTER_REPLY: mark VF as registered, signal completion - VF_UNREGISTER_REPLY: mark VF as unregistered, signal completion - PF_LINK_STATE_NOTIF: update carrier state via netif_carrier_on/off, send ACK back to PF VF initiation functions for the probe-time handshake: - enic_mbox_vf_capability_check: send capability request, wait for PF reply via completion - enic_mbox_vf_register: send register request, wait for PF confirmation via completion - enic_mbox_vf_unregister: send unregister request, wait for PF confirmation The wait helper (enic_mbox_wait_reply) uses wait_for_completion_timeout, signaled when the admin ISR and CQ-poll/dispatch workqueue pipeline delivers the reply message. mbox_expected_reply is written by the request thread and read by the admin CQ poll/dispatch context that runs the receive handlers; annotate those accesses with READ_ONCE()/WRITE_ONCE() under the single-outstanding-reply invariant. Signed-off-by: Satish Kharat <satishkh@cisco.com> Link: https://patch.msgid.link/20260812-enic-sriov-v2-admin-channel-v2-v13-8-b3809e448aba@cisco.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-08-17enic: add MBOX PF handlers for VF register and capabilitySatish Kharat3-4/+194
Implement PF-side mailbox message processing for SR-IOV V2 admin channel communication. When the PF receives messages from VFs, the dispatch routes them to type-specific handlers: - VF_CAPABILITY_REQUEST: reply with protocol version 1 - VF_REGISTER_REQUEST: send the register reply, mark the VF registered on success, then send PF_LINK_STATE_NOTIF reflecting the PF's current carrier state - VF_UNREGISTER_REQUEST: mark VF unregistered, send reply - PF_LINK_STATE_ACK: log errors from VF acknowledgment Per-VF state (struct enic_vf_state) is tracked via enic->vf_state which will be allocated when SRIOV V2 is enabled. Remove the CONFIG_PCI_IOV guard from num_vfs in struct enic. The PF handlers reference enic->num_vfs for VF ID bounds checking in enic_mbox.c, which is compiled unconditionally. The field must be visible regardless of CONFIG_PCI_IOV to avoid build failures. Add enic_mbox_send_link_state() helper for PF-initiated link state notifications. Signed-off-by: Satish Kharat <satishkh@cisco.com> Link: https://patch.msgid.link/20260812-enic-sriov-v2-admin-channel-v2-v13-7-b3809e448aba@cisco.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-08-17enic: add MBOX core send and receive for admin channelSatish Kharat5-3/+232
Implement the mailbox protocol engine used for PF-VF communication over the admin channel. The send path (enic_mbox_send_msg) builds a message with a common header, DMA-maps it, posts a single WQ descriptor with the destination vnic ID encoded in the VLAN tag field, and polls the WQ CQ for completion. The total message length is computed as a size_t, and the payload is bounded before the send lock is taken: a payload larger than the admin buffer minus the header is rejected with -EINVAL. This keeps the length sum from wrapping and stops the on-the-wire u16 length from overflowing or the DMA buffer from being overrun. MBOX sends are gated by enic->mbox_send_disabled: enic_mbox_send_msg() returns early while it is set. It is set at the very start of both enic_admin_channel_open() and enic_admin_channel_close(), and is cleared in enic_admin_channel_open() only once the admin WQ/RQ/CQ and interrupt are fully allocated, programmed and enabled. Keeping it set for the whole open sequence means an early failure that returns before the channel is ready (as well as a not-yet-ready or torn-down channel) leaves sends disabled, so a concurrent sender can never race an MBOX send against a half-open or freed admin_wq. The receive path (enic_mbox_recv_handler) is installed as the admin RQ callback and validates incoming message headers. PF/VF-specific dispatch will be added in subsequent commits. Signed-off-by: Satish Kharat <satishkh@cisco.com> Link: https://patch.msgid.link/20260812-enic-sriov-v2-admin-channel-v2-v13-6-b3809e448aba@cisco.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>