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2026-03-27arm64: dts: ti: k3-j721s2: Make MAIN domain system control bus a simple-busAndrew Davis1-3/+2
This node describes a memory address range containing several sub-regions with control registers for various IP in the MAIN domain of this SoC. It was described as a "ti,j721e-system-controller" but this is a J721S2 SoC with is not compatible with the system controller region found in J721e. No project consuming this DT has been found that makes use of the syscon compatible for this region, to prevent any from using this node like a generic syscon region in the future, make this a normal simple-bus as it should have been from the start. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com> Link: https://patch.msgid.link/20260303205224.108217-2-afd@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2026-03-27arm64: dts: ti: k3-j7200: Make MAIN domain system control bus a simple-busAndrew Davis1-3/+2
This node describes a memory address range containing several sub-regions with control registers for various IP in the MAIN domain of this SoC. It was described as a "ti,j721e-system-controller" but this is a J7200 SoC with is not compatible with the system controller region found in J721e. No project consuming this DT has been found that makes use of the syscon compatible for this region, to prevent any from using this node like a generic syscon region in the future, make this a normal simple-bus as it should have been from the start. Signed-off-by: Andrew Davis <afd@ti.com> Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com> Link: https://patch.msgid.link/20260303205224.108217-1-afd@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2026-03-27arm64: dts: ti: k3-am62-lp-sk: Enable internal pulls for MMC0 data pinsJudith Mendez1-7/+7
AM62 LP SK board does not have external pullups on MMC0 DAT1-DAT7 pins [0]. Enable internal pullups on DAT1-DAT7 considering: - without a host-side pullup, these lines rely solely on the eMMC device's internal pullup (R_int, 10-150K per JEDEC), which may exceed the recommended 50K max for 1.8V VCCQ - JEDEC JESD84-B51 Table 200 requires host-side pullups (R_DAT, 10K-100K) on all data lines to prevent bus floating [0] https://www.ti.com/lit/zip/SPRR471 Fixes: a0b8da04153e ("arm64: dts: ti: k3-am62*: Move eMMC pinmux to top level board file") Signed-off-by: Judith Mendez <jm@ti.com> Reviewed-by: Moteen Shah <m-shah@ti.com> Link: https://patch.msgid.link/20260223233731.2690472-4-jm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2026-03-27arm64: dts: ti: k3-am62l3-evm: Disable MMC1 internal pulls on data pinsJudith Mendez1-3/+3
AM62L EVM has external 47K pullups on MMC1 DAT1-DAT3 pins [0]. Disable internal pullups on DAT1-DAT3 so that each line has a single pullup source: - with both pullups enabled, the effective parallel resistance on DAT1-3 (~24.2K) creates a ~2x mismatch vs DAT0 (47K external only). Removing internal pullups results in DAT1-3 matching DAT0 at 47K - 47K external alone is within the recommended range for 1.8V signaling (10K min, 50K recommended max) - both internal and external pullups enabled equals unnecessary power consumption [0] https://www.ti.com/lit/zip/SPRCAL6 Fixes: 00fb4c73b67d ("arm64: dts: ti: k3-am62l: add initial reference board file") Signed-off-by: Judith Mendez <jm@ti.com> Reviewed-by: Moteen Shah <m-shah@ti.com> Link: https://patch.msgid.link/20260223233731.2690472-3-jm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2026-03-27arm64: dts: ti: k3-am62p5-sk: Disable MMC1 internal pulls on data pinsJudith Mendez1-3/+3
AM62P SK has external 10K pullups on MMC1 DAT1-DAT3 pins [0]. Disable internal pullups on DAT1-DAT3 so that each line has a single pullup source: - with both pullups enabled, the effective parallel resistance on DAT1-3 (~8.33K) drops below the 10K minimum pullup requirement for data lines (per SD Physical Layer Specification) - removing internal pullups makes DAT1-3 match DAT0 10K external pullup so its consistent and within spec - both internal and external pullups enabled equals unnecessary power consumption [0] https://www.ti.com/lit/zip/SPRR487 Fixes: c00504ea42c0 ("arm64: dts: ti: k3-am62p5-sk: Updates for SK EVM") Signed-off-by: Judith Mendez <jm@ti.com> Reviewed-by: Moteen Shah <m-shah@ti.com> Link: https://patch.msgid.link/20260223233731.2690472-2-jm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2026-03-27arm64: dts: ti: k3-am62d2-evm: Enable Main UART wakeupKendall Willis1-1/+12
The Main UART can resume from suspend to RAM states when PIN_WKUP_EN is enabled. Add the necessary pins needed to wakeup the system. Add the system idle states that the Main UART can wakeup the system from. The UART driver uses the "default" pinctrl state when the system is active. In the suspend hook, if the UART is wakeup enabled, the "wakeup" pinctrl state is selected by the UART driver in order to allow wakeup. Upon resume, the default pinctrl state is selected again. Signed-off-by: Kendall Willis <k-willis@ti.com> Link: https://patch.msgid.link/20260212-b4-uart-daisy-chain-dts-v5-5-26c7f534e567@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2026-03-27arm64: dts: ti: k3-am62l3-evm: Enable Main UART wakeupKendall Willis1-1/+10
The Main UART can resume from suspend to RAM states when PIN_WKUP_EN is enabled. Add the necessary pins needed to wakeup the system. Add the system idle states that the Main UART can wakeup the system from. The UART driver uses the "default" pinctrl state when the system is active. In the suspend hook, if the UART is wakeup enabled, the "wakeup" pinctrl state is selected by the UART driver in order to allow wakeup. Upon resume, the default pinctrl state is selected again. Reviewed-by: Markus Schneider-Pargmann <msp@baylibre.com> Reviewed-by: Dhruva Gole <d-gole@ti.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kendall Willis <k-willis@ti.com> Link: https://patch.msgid.link/20260212-b4-uart-daisy-chain-dts-v5-4-26c7f534e567@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2026-03-27arm64: dts: ti: k3-am62p5-sk: Enable Main UART wakeupKendall Willis1-1/+12
The Main UART can resume from suspend to RAM states when PIN_WKUP_EN is enabled. Add the necessary pins needed to wakeup the system. Add the system idle states that the Main UART can wakeup the system from. The UART driver uses the "default" pinctrl state when the system is active. In the suspend hook, if the UART is wakeup enabled, the "wakeup" pinctrl state is selected by the UART driver in order to allow wakeup. Upon resume, the default pinctrl state is selected again. Reviewed-by: Markus Schneider-Pargmann <msp@baylibre.com> Reviewed-by: Dhruva Gole <d-gole@ti.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kendall Willis <k-willis@ti.com> Link: https://patch.msgid.link/20260212-b4-uart-daisy-chain-dts-v5-3-26c7f534e567@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2026-03-27arm64: dts: ti: k3-am62a7-sk: Enable Main UART wakeupKendall Willis1-1/+12
The Main UART can resume from suspend to RAM states when PIN_WKUP_EN is enabled. Add the necessary pins needed to wakeup the system. Add the system idle states that the Main UART can wakeup the system from. The UART driver uses the "default" pinctrl state when the system is active. In the suspend hook, if the UART is wakeup enabled, the "wakeup" pinctrl state is selected by the UART driver in order to allow wakeup. Upon resume, the default pinctrl state is selected again. Reviewed-by: Markus Schneider-Pargmann <msp@baylibre.com> Reviewed-by: Dhruva Gole <d-gole@ti.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kendall Willis <k-willis@ti.com> Link: https://patch.msgid.link/20260212-b4-uart-daisy-chain-dts-v5-2-26c7f534e567@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2026-03-27arm64: dts: ti: k3-am62x-sk-common: Enable Main UART wakeupKendall Willis1-1/+12
The Main UART can resume from suspend to RAM states when PIN_WKUP_EN is enabled. Add the necessary pins needed to wakeup the system. Add the system idle states that the Main UART can wakeup the system from. The UART driver uses the "default" pinctrl state when the system is active. In the suspend hook, if the UART is wakeup enabled, the "wakeup" pinctrl state is selected by the UART driver in order to allow wakeup. Upon resume, the default pinctrl state is selected again. Reviewed-by: Markus Schneider-Pargmann <msp@baylibre.com> Reviewed-by: Dhruva Gole <d-gole@ti.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kendall Willis <k-willis@ti.com> Link: https://patch.msgid.link/20260212-b4-uart-daisy-chain-dts-v5-1-26c7f534e567@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2026-03-26ARM: dts: renesas: Drop KSZ8041 PHY C22 compatible stringsMarek Vasut9-18/+9
The Microchip KSZ8041 PHY schema indicates that the compatible string "ethernet-phy-id0022.1537" must not be followed by any other compatible string. Drop trailing "ethernet-phy-ieee802.3-c22" to match the schema. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20260326045523.223620-1-marek.vasut+renesas@mailbox.org Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-03-26ARM: dts: renesas: rza2mevb: Drop RTL8201F PHY C22 compatible stringMarek Vasut1-2/+1
The Realtek RTL8201F PHY schema indicates that the compatible string "ethernet-phy-id001c.c816" must not be followed by any other compatible string. Drop trailing "ethernet-phy-ieee802.3-c22" to match the schema. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20260326045416.223556-1-marek.vasut+renesas@mailbox.org Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-03-26ARM: dts: renesas: r8a7742-iwg21d-q7-dbcm-ca: Drop KSZ8081 PHY C22 ↵Marek Vasut1-2/+1
compatible string The Microchip KSZ8081 PHY schema indicates that the compatible string "ethernet-phy-id0022.1560" must not be followed by any other compatible string. Drop trailing "ethernet-phy-ieee802.3-c22" to match the schema. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20260326045355.223529-1-marek.vasut+renesas@mailbox.org Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-03-26arm64: dts: renesas: Add initial device tree for RZ/G3L SMARC EVK boardBiju Das2-0/+39
Add the initial device tree for the Renesas RZ/G3L SMARC EVK board. Added placeholders to avoid compilation error with the common code in renesas-smarc2.dtsi. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://patch.msgid.link/20260324114329.268249-12-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-03-26arm64: dts: renesas: renesas-smarc2: Move usb3 nodes to board DTSBiju Das2-8/+6
The SMARC2 board DTSI is common to multiple SoCs. Move the USB3 nodes to the board DTS, as some SoCs (e.g. RZ/G3[SL]) do not support USB3. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://patch.msgid.link/20260324114329.268249-11-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-03-26arm64: dts: renesas: Add initial support for RZ/G3L SMARC SoMBiju Das1-0/+20
Add initial support for the RZ/G3L SMARC SoM with 2GiB memory and extal clk. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://patch.msgid.link/20260324114329.268249-10-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-03-26arm64: dts: renesas: Add initial DTSI for RZ/G3L SoCBiju Das2-0/+225
Add the initial DTSI for the RZ/G3L SoC. The files in this commit have the following meaning: - r9a08g046.dtsi: RZ/G3L family SoC common parts - r9a08g046l48.dtsi: RZ/G3L R9A08G046L48 SoC-specific parts Add placeholders to reuse the code for the Renesas SMARC II carrier board. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20260324114329.268249-9-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-03-26arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Add versa3 clock generator nodeOvidiu Panait1-0/+25
Add versa3 clock generator node. It provides clocks for the RTC, PCIe and audio devices. Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20260302165441.4457-8-ovidiu.panait.rb@renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-03-26KVM: arm64: Expose FEAT_LSUI to guestsYeoreum Yun1-1/+2
Expose the FEAT_LSUI ID register field to guests. Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com> Acked-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2026-03-26arm64: cpufeature: Add FEAT_LSUIYeoreum Yun3-0/+13
Since Armv9.6, FEAT_LSUI introduces atomic instructions that allow privileged code to access user memory without clearing the PSTATE.PAN bit. Add CPU feature detection for FEAT_LSUI. Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com> [catalin.marinas@arm.com: Remove commit log references to SW_PAN] Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2026-03-26RISC-V: KVM: Validate SBI STA shmem alignment in kvm_sbi_ext_sta_set_reg()Jiakai Xu1-5/+11
The RISC-V SBI Steal-Time Accounting (STA) extension requires the shared memory physical address to be 64-byte aligned, or set to all-ones to explicitly disable steal-time accounting. KVM exposes the SBI STA shared memory configuration to userspace via KVM_SET_ONE_REG. However, the current implementation of kvm_sbi_ext_sta_set_reg() does not validate the alignment of the configured shared memory address. As a result, userspace can install a misaligned shared memory address that violates the SBI specification. Such an invalid configuration may later reach runtime code paths that assume a valid and properly aligned shared memory region. In particular, KVM_RUN can trigger the following WARN_ON in kvm_riscv_vcpu_record_steal_time(): WARNING: arch/riscv/kvm/vcpu_sbi_sta.c:49 at kvm_riscv_vcpu_record_steal_time WARN_ON paths are not expected to be reachable during normal runtime execution, and may result in a kernel panic when panic_on_warn is enabled. Fix this by validating the computed shared memory GPA at the KVM_SET_ONE_REG boundary. A temporary GPA is constructed and checked before committing it to vcpu->arch.sta.shmem. The validation allows either a 64-byte aligned GPA or INVALID_GPA (all-ones), which disables STA as defined by the SBI specification. This prevents invalid userspace state from reaching runtime code paths that assume SBI STA invariants and avoids unexpected WARN_ON behavior. Fixes: f61ce890b1f074 ("RISC-V: KVM: Add support for SBI STA registers") Signed-off-by: Jiakai Xu <xujiakai2025@iscas.ac.cn> Signed-off-by: Jiakai Xu <jiakaiPeanut@gmail.com> Reviewed-by: Andrew Jones <andrew.jones@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260303010859.1763177-2-xujiakai2025@iscas.ac.cn Signed-off-by: Anup Patel <anup@brainfault.org>
2026-03-26arm64: dts: qcom: hamoa-evk: Add DP0/DP1 audio playback supportLe Qi1-0/+32
The hamoa-evk DTS currently lacks DAI links for DP0 and DP1, preventing the sound card from exposing these playback paths. Add the missing links to enable audio output on both DP interfaces. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Le Qi <le.qi@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260210024037.3719191-1-le.qi@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26LoongArch: Override arch_dynirq_lower_bound to reserve LPC IRQsIcenowy Zheng1-0/+6
Loongson 7A PCH chips all contain a LPC controller, which is used in some devices to connect legacy ISA devices (e.g. 8259 PS/2 controller). The LPC irqchip driver will register LPC interrupts at the fixed range 0~15, and the PCH PIC irqchip driver uses dynamic allocation. However the LPC interrupt numbers are currently not exempted from dynamic allocation. The current setup work by accident because the LPC interrupt controller is the first consumer of PIC interrupt controller, and the PIC interrupt number is allocated after LPC interrupts are registered. Such setup is fragile and will stop to work when the LPC irqchip driver is reworked. Override arch_dynirq_lower_bound() to reserve LPC interrupts from dynamic allocation, to prevent interrupt number collision and allow rework of the LPC irqchip driver. Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Reviewed-by: Huacai Chen <chenhuacai@loongson.cn> Link: https://patch.msgid.link/20260321092032.3502701-3-zhengxingda@iscas.ac.cn
2026-03-26MIPS: loongson64: Override arch_dynirq_lower_bound to reserve LPC IRQsIcenowy Zheng1-0/+6
On some Loongson 3A devices, a LPC bus is present and some legacy devices (e.g. 8259) on it expect hardcoded low interrupt numbers. However currently the expected low range interrupt numbers are not exempted from the dynamic allocation, which leads to conflicts when registering LPC interrupts in the fixed range. Override arch_dynirq_lower_bound() to reserve these low range interrupt numbers and prevent them from being dynamically allocated. Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Reviewed-by: Huacai Chen <chenhuacai@loongson.cn> Link: https://patch.msgid.link/20260321092032.3502701-2-zhengxingda@iscas.ac.cn
2026-03-26KVM: s390: Fix KVM_S390_VCPU_FAULT ioctlClaudio Imbrenda1-3/+15
A previous commit changed the behaviour of the KVM_S390_VCPU_FAULT ioctl. The current (wrong) implementation will trigger a guest addressing exception if the requested address lies outside of a memslot, unless the VM is UCONTROL. Restore the previous behaviour by open coding the fault-in logic. Fixes: 3762e905ec2e ("KVM: s390: use __kvm_faultin_pfn()") Acked-by: Christian Borntraeger <borntraeger@linux.ibm.com> Reviewed-by: Steffen Eiden <seiden@linux.ibm.com> Signed-off-by: Claudio Imbrenda <imbrenda@linux.ibm.com>
2026-03-26KVM: s390: vsie: Fix guest page tables protectionClaudio Imbrenda1-2/+10
When shadowing, the guest page tables are write-protected, in order to trap changes and properly unshadow the shadow mapping for the nested guest. Already shadowed levels are skipped, so that only the needed levels are write protected. Currently the levels that get write protected are exactly one level too deep: the last level (nested guest memory) gets protected in the wrong way, and will be protected again correctly a few lines afterwards; most importantly, the highest non-shadowed level does *not* get write protected. Moreover, if the nested guest is running in a real address space, there are no DAT tables to shadow. Write protect the correct levels, so that all the levels that need to be protected are protected, and avoid double protecting the last level; skip attempting to shadow the DAT tables when the nested guest is running in a real address space. Fixes: e38c884df921 ("KVM: s390: Switch to new gmap") Tested-by: Christian Borntraeger <borntraeger@linux.ibm.com> Reviewed-by: Janosch Frank <frankja@linux.ibm.com> Signed-off-by: Claudio Imbrenda <imbrenda@linux.ibm.com>
2026-03-26KVM: s390: vsie: Fix unshadowing while shadowingClaudio Imbrenda2-1/+19
If shadowing causes the shadow gmap to get unshadowed, exit early to prevent an attempt to dereference the parent pointer, which at this point is NULL. Opportunistically add some more checks to prevent NULL parents. Fixes: a2c17f9270cc ("KVM: s390: New gmap code") Fixes: e5f98a6899bd ("KVM: s390: Add some helper functions needed for vSIE") Fixes: e38c884df921 ("KVM: s390: Switch to new gmap") Signed-off-by: Claudio Imbrenda <imbrenda@linux.ibm.com>
2026-03-26KVM: s390: vsie: Fix refcount overflow for shadow gmapsClaudio Imbrenda1-1/+3
In most cases gmap_put() was not called when it should have. Add the missing gmap_put() in vsie_run(). Fixes: e38c884df921 ("KVM: s390: Switch to new gmap") Reviewed-by: Steffen Eiden <seiden@linux.ibm.com> Reviewed-by: Janosch Frank <frankja@linux.ibm.com> Signed-off-by: Claudio Imbrenda <imbrenda@linux.ibm.com>
2026-03-26KVM: s390: vsie: Fix nested guest memory shadowingClaudio Imbrenda1-6/+15
Fix _do_shadow_pte() to use the correct pointer (guest pte instead of nested guest) to set up the new pte. Add a check to return -EOPNOTSUPP if the mapping for the nested guest is writeable but the same page in the guest is only read-only. Fixes: e38c884df921 ("KVM: s390: Switch to new gmap") Signed-off-by: Claudio Imbrenda <imbrenda@linux.ibm.com>
2026-03-26KVM: s390: Correctly handle guest mappings without struct pageClaudio Imbrenda3-13/+14
Introduce a new special softbit for large pages, like already presend for normal pages, and use it to mark guest mappings that do not have struct pages. Whenever a leaf DAT entry becomes dirty, check the special softbit and only call SetPageDirty() if there is an actual struct page. Move the logic to mark pages dirty inside _gmap_ptep_xchg() and _gmap_crstep_xchg_atomic(), to avoid needlessly duplicating the code. Fixes: 5a74e3d93417 ("KVM: s390: KVM-specific bitfields and helper functions") Fixes: a2c17f9270cc ("KVM: s390: New gmap code") Reviewed-by: Christian Borntraeger <borntraeger@linux.ibm.com> Signed-off-by: Claudio Imbrenda <imbrenda@linux.ibm.com>
2026-03-26KVM: s390: Fix gmap_link()Claudio Imbrenda3-54/+52
The slow path of the fault handler ultimately called gmap_link(), which assumed the fault was a major fault, and blindly called dat_link(). In case of minor faults, things were not always handled properly; in particular the prefix and vsie marker bits were ignored. Move dat_link() into gmap.c, renaming it accordingly. Once moved, the new _gmap_link() function will be able to correctly honour the prefix and vsie markers. This will cause spurious unshadows in some uncommon cases. Fixes: 94fd9b16cc67 ("KVM: s390: KVM page table management functions: lifecycle management") Fixes: a2c17f9270cc ("KVM: s390: New gmap code") Reviewed-by: Steffen Eiden <seiden@linux.ibm.com> Signed-off-by: Claudio Imbrenda <imbrenda@linux.ibm.com>
2026-03-26KVM: s390: vsie: Fix check for pre-existing shadow mappingClaudio Imbrenda1-2/+3
When shadowing a nested guest, a check is performed and no shadowing is attempted if the nested guest is already shadowed. The existing check was incomplete; fix it by also checking whether the leaf DAT table entry in the existing shadow gmap has the same protection as the one specified in the guest DAT entry. Fixes: e38c884df921 ("KVM: s390: Switch to new gmap") Reviewed-by: Steffen Eiden <seiden@linux.ibm.com> Reviewed-by: Janosch Frank <frankja@linux.ibm.com> Signed-off-by: Claudio Imbrenda <imbrenda@linux.ibm.com>
2026-03-26KVM: s390: Remove non-atomic dat_crstep_xchg()Claudio Imbrenda5-96/+99
In practice dat_crstep_xchg() is racy and hard to use correctly. Simply remove it and replace its uses with dat_crstep_xchg_atomic(). This solves some actual races that lead to system hangs / crashes. Opportunistically fix an alignment issue in _gmap_crstep_xchg_atomic(). Fixes: 589071eaaa8f ("KVM: s390: KVM page table management functions: clear and replace") Fixes: 94fd9b16cc67 ("KVM: s390: KVM page table management functions: lifecycle management") Reviewed-by: Steffen Eiden <seiden@linux.ibm.com> Signed-off-by: Claudio Imbrenda <imbrenda@linux.ibm.com>
2026-03-26KVM: s390: vsie: Fix dat_split_ste()Claudio Imbrenda1-0/+1
If the guest misbehaves and puts the page tables for its nested guest inside the memory of the nested guest itself, and the guest and nested guest are being mapped with large pages, the shadow mapping will lose synchronization with the actual mapping, since this will cause the large page with the vsie notification bit to be split, but the vsie notification bit will not be propagated to the resulting small pages. Fix this by propagating the vsie_notif bit from large pages to normal pages when splitting a large page. Fixes: 2db149a0a6c5 ("KVM: s390: KVM page table management functions: walks") Reviewed-by: Christoph Schlameuss <schlameuss@linux.ibm.com> Reviewed-by: Steffen Eiden <seiden@linux.ibm.com> Reviewed-by: Janosch Frank <frankja@linux.ibm.com> Signed-off-by: Claudio Imbrenda <imbrenda@linux.ibm.com>
2026-03-26arm64: dts: qcom: Drop CPU masks from GICv3 PPI interruptsGeert Uytterhoeven17-73/+69
Unlike older GIC variants, the GICv3 DT bindings do not support specifying a CPU mask in PPI interrupt specifiers. Drop the masks. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/226c5d1005a6e295e0581b2c89e5510dbb7aa9d1.1772643434.git.geert+renesas@glider.be Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: eliza: Add missing msi-parent for UFSAbel Vesa1-0/+2
Wire up the UFS controller to the GIC ITS by specifying the msi-parent property. The UFS host uses MSI and requires a valid ITS mapping in order to allocate and receive interrupts. Add the ITS reference along with the device ID to match the SMMU stream ID. Fixes: db7fe6963466 ("arm64: dts: qcom: Introduce Eliza Soc base dtsi") Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260324-eliza-base-dt-fixes-v3-3-3a4a03e72f8f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: eliza: Add missing CX power domain to GCCAbel Vesa1-0/+2
Unless CX is declared the power-domain of GCC votes (power and performance) on the GDSCs provided by GCC will not propagate to the CX, which might result in under-voltage conditions. Add the missing power-domains property to associate GCC with RPMHPD_CX. Fixes: db7fe6963466 ("arm64: dts: qcom: Introduce Eliza Soc base dtsi") Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260324-eliza-base-dt-fixes-v3-2-3a4a03e72f8f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: eliza: Coding style clean-upsAbel Vesa1-12/+15
Some coding style issues were raised during review but the devicetree was merged meanwhile. Address them here. These changes are non-functional. Fixes: db7fe6963466 ("arm64: dts: qcom: Introduce Eliza Soc base dtsi") Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260324-eliza-base-dt-fixes-v3-1-3a4a03e72f8f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: patch mahua thermal zones by labelDmitry Baryshkov2-149/+148
Updating DT nodes by the full path is fragile and frowned upon, it's easy to miss the rename of the node in the main tree. Add necessary labels and patch thermal zones for Mahua using those labels. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260320-mahua-fix-thermals-v1-1-8957bf976c90@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: purwa: deduplicate thermal sensors with HamoaDmitry Baryshkov2-568/+72
Hamoa and Purwa have pretty close thermal zones definitions. The major difference is that several zones are absent (because of the lack of the CPU cluster) and several zones use tsens2 instead of tsens3. Instead of completely duplicating thermal zones for Purwa, reuse themal zones from Hamoa, patching them where required. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260320-purwa-drop-thermals-v1-1-2c9fe046cd02@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: glymur-crd: Enable WLAN and BluetoothAbel Vesa1-6/+112
Both Glymur and Mahua CRDs feature a WCN7850 M.2 WLAN and Bluetooth combo card. So describe both the 0.9V and the 3.3V regulators, then WCN7850 PMU and the PCIe WLAN and the UART Bluetooth nodes. Do this in the Glymur CRD generic dtsi so that both Glymur and Mahua CRDs benefit from it towards enabling WLAN and Bluetooth functionality. Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Tested-by: Gopikrishna Garmidi <gopikrishna.garmidi@oss.qualcomm.com> Reviewed-by: Zijun Hu <zijun.hu@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260324-glymur-dts-crd-enable-bt-wlan-v2-1-6afcf1ac277a@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: kodiak: Add LPASS I2S2 pinctrl definitionsVal Packett1-0/+52
Add the pinctrl definitions to configure gpio10-gpio13 of the lpass_tlmm for I2S output. Signed-off-by: Val Packett <val@packett.cool> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260323095247.92890-1-val@packett.cool Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: add IPQ5210 SoC and rdp504 board supportKathiravan Thirumoorthy3-0/+391
Add initial device tree support for the Qualcomm IPQ5210 SoC and rdp504 board. Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260325-ipq5210_boot_to_shell-v3-2-9c7360d19d10@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: sm8750: Enable TSENS and thermal zonesManaf Meethalavalappu Pallikunhi1-0/+897
The sm8750 includes four TSENS instances, with a total of 47 thermal sensors distributed across various locations on the SoC. The TSENS max/reset threshold is configured to 130°C in the hardware. Enable all TSENS instances, and define the thermal zones with a hot trip at 120°C and critical trip at 125°C. Signed-off-by: Manaf Meethalavalappu Pallikunhi <quic_manafm@quicinc.com> Signed-off-by: Gaurav Kohli <gaurav.kohli@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260325-sm8750_tsens-v2-1-8a554e54dc1b@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: mahua: Fix mahua bwmonPragnesh Papaniya1-0/+1
Delete the bwmon node that corresponds to non-existent cpu cluster 2 on Mahua SoCs. Fixes: 598eedb21ddd ("arm64: dts: qcom: Add Mahua SoC and CRD") Tested-by: Gopikrishna Garmidi <gopikrishna.garmidi@oss.qualcomm.com> Signed-off-by: Pragnesh Papaniya <pragnesh.papaniya@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260325-bwmon_fixes-v1-2-9433f9d4c276@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: glymur: Add missing opp entryPragnesh Papaniya1-0/+4
Add missing opp entry that corresponds to highest ddr frequency for Glymur/Mahua SoCs. Fixes: e4945894c1cb ("arm64: dts: qcom: glymur: Add glymur BWMONs") Signed-off-by: Pragnesh Papaniya <pragnesh.papaniya@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260325-bwmon_fixes-v1-1-9433f9d4c276@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: lemans: Correct QUP interrupt numbersViken Dadhaniya1-4/+4
Fix GIC_SPI interrupt numbers for QUPv3 SE6 nodes on Lemans SoC. Using incorrect interrupt lines can prevent IRQs from triggering and break I2C, SPI, and UART operation. Fixes: 34a407316b7d3 ("arm64: dts: qcom: sa8775p: Populate additional UART DT nodes") Fixes: 1b2d7ad5ac14d ("arm64: dts: qcom: sa8775p: add missing spi nodes") Fixes: ee2f5f906d69d ("arm64: dts: qcom: sa8775p: add missing i2c nodes") Cc: stable@vger.kernel.org Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260325-lemans-irq-num-v1-1-a470d544966a@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: qrb5165-rb5: Drop redundant non-controllable suppliesKrzysztof Kozlowski1-37/+2
Drop completely redundant non-controllable chain of "regulator-fixed" supplies, which serve no purpose except growing DTS and kernel boot time. They represent no added value and because of being completely transparent for any users of DTS (except the bloat), they should not be represented in DTS, just like we do not represent every transistor there. For the few regulators being actively used and supplied by removed dummies, change the supply to match the actual final source without these dummy intermediaries. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260310-qcom-dts-supplies-v1-5-5071a7052ea9@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: qrb4210-rb2: Drop redundant non-controllable suppliesKrzysztof Kozlowski1-45/+0
Drop completely redundant non-controllable chain of "regulator-fixed" supplies, which serve no purpose except growing DTS and kernel boot time. They represent no added value and because of being completely transparent for any users of DTS (except the bloat), they should not be represented in DTS, just like we do not represent every transistor there. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260310-qcom-dts-supplies-v1-4-5071a7052ea9@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: qrb2210-rb1: Drop redundant non-controllable suppliesKrzysztof Kozlowski1-45/+0
Drop completely redundant non-controllable chain of "regulator-fixed" supplies, which serve no purpose except growing DTS and kernel boot time. They represent no added value and because of being completely transparent for any users of DTS (except the bloat), they should not be represented in DTS, just like we do not represent every transistor there. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260310-qcom-dts-supplies-v1-3-5071a7052ea9@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
generated by cgit (git 2.54.0.dirty) at 2026-10-01 01:45:55 +0000