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2026-07-03dt-bindings: display: panel: document the Renesas R63419 based dual-DSI ↵Neil Armstrong1-0/+98
video mode Display Panels Document the Renesas R63419 based dual-DSI video mode Display Panels found in the Ayaneo gaming handled devices. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patch.msgid.link/20260625-topic-sm8650-ayaneo-pocket-s2-r63419-v8-1-8570e692143e@linaro.org
2026-07-03dt-bindings: display: panel: add Ilitek ILI7807S panel controllerArpit Saini1-0/+71
ILI7807S is a DSI display controller used to drive MIPI-DSI panels. The DLC DLC0697 1080x1920 LCD panel is based on this controller. The panel requires a reset GPIO, I/O voltage supply (vddi), positive LCD bias supply (avdd) and negative LCD bias supply (avee). The panel operates in video burst mode with four data lanes using RGB888 pixel format. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Arpit Saini <arpit.saini@oss.qualcomm.com> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patch.msgid.link/20260701-ili7807s-v4-1-c7d76d4780a5@oss.qualcomm.com
2026-07-03net: ipv4: report multicast group user countYuyang Huang1-0/+4
RTM_GETMULTICAST has been part of the rtnetlink ABI for a long time and already reports IPv4 multicast group membership through IFA_MULTICAST and IFA_CACHEINFO. It does not report how many consumers hold each membership, so userspace still has to parse /proc/net/igmp to get the Users column. Add IFA_MC_USERS as a u32 attribute carrying ip_mc_list::users in RTM_GETMULTICAST replies and entry-lifecycle notifications. This gives iproute2 enough information to migrate the IPv4 part of "ip maddr show" from procfs parsing to rtnetlink. Signed-off-by: Yuyang Huang <sigefriedhyy@gmail.com> Reviewed-by: Vadim Fedorenko <vadim.fedorenko@linux.dev> Reviewed-by: Ido Schimmel <idosch@nvidia.com> Link: https://patch.msgid.link/20260630110207.37841-2-sigefriedhyy@gmail.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2026-07-02Merge tag 'vfio-v7.2-rc2' of https://github.com/awilliam/linux-vfioLinus Torvalds1-0/+26
Pull VFIO fixes from Alex Williamson: "Mostly straightforward fixes here, inconsistent runtime PM handling due to global device policies, bitfield races, unwind path gaps, teardown ordering, and a misplaced library flag. - Fix racy bitfield updates in vfio-pci-core and the mlx5 vfio-pci variant driver with a binary split between setup/release and runtime modified flags. These were noted across several Sashiko reviews as pre-existing issues (Alex Williamson) - Fix runtime PM inconsistency where the vfio-pci driver module_init could modify the idle PM policy of existing devices through globals managed in vfio-pci-core, leading to unbalanced runtime PM operations (Alex Williamson) - Restore mutability of writable vfio-pci module options by further pulling policy globals out of vfio-pci-core, to instead be latched per device at device init. Provide visibility of the per device latched values through debugfs (Alex Williamson) - Fix missing VGA arbiter uninit callback in unwind path (Alex Williamson) - Reorder device debugfs removal before device_del() to avoid gap where debugfs is available with stale devres pointers (Alex Williamson) - Move UUID library linking flag from vfio selftest Makefile into libvfio.mk to avoid exposing such dependencies when linking with KVM selftests (Sean Christopherson)" * tag 'vfio-v7.2-rc2' of https://github.com/awilliam/linux-vfio: vfio: selftests: Add luuid to libvfio.mk's list of libraries, not to the Makefile vfio/pci: Expose latched module parameter policy in debugfs vfio: Remove device debugfs before releasing devres vfio/pci: Latch all module parameters per device vfio/mlx5: Fix racy bitfields and tighten struct layout vfio/pci: Fix racy bitfields and tighten struct layout vfio/pci: Release the VGA arbiter client on register_device() failure vfio/pci: Latch disable_idle_d3 per device
2026-07-02dt-bindings: arm: qcom: document QCS8550 RB5Gen2 boardJoe Sandom1-0/+6
Document the Qualcomm RB5gen2 from Thundercomm based on the QCS8550 chipset from Qualcomm. [1] https://www.thundercomm.com/product/qualcomm-rb5-gen-2-development-kit/ Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Joe Sandom <jsandom@axon.com> Link: https://lore.kernel.org/r/20260420-rb5gen2-dts-v4-4-b461909c2de8@axon.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-02dt-bindings: sram: document glymur as compatibleAnanthu C V1-0/+1
Add compatible for Qualcomm's glymur IMEM, a block of sram which can fall back to mmio-sram. Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Ananthu C V <ananthu.cv@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260424-glymur-imem-v5-1-18ede63cf063@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-02ASoC: Add Loongson-2K0300 I2S controller and sound card supportMark Brown2-8/+67
Binbin Zhou <zhoubinbin@loongson.cn> says: This series adds ASoC support for the Loongson-2K0300 SoC and its associated development boards, including the CTCISZ Forever Pi and the ATK-DL2K0300B. Key changes: - Extend DT bindings to support ls2k0300-i2s and new audio card compatibles. - Refactor the platform I2S driver to handle SoC differences via per-device configuration (rev_id, optional APB DMA config, reset sequence). - Refactor the audio machine driver to support board-specific DAI formats, GPIO-based headphone detection/control, speaker enable, and DAPM routing. - Add jack detection and automatic switching between headphones and speakers for the DL2K0300B board. The patchset also cleans up the existing audio card binding by referencing the common sound-card properties, and adds new compatibles for the Loongson-2K0300 variants with proper DAI format handling. All changes have been tested on Loongson-2K2000 (PCI), Loongson-2K0300 Forever Pi and Loongson-2K0300 DL2K0300B boards. Link: https://patch.msgid.link/cover.1782439646.git.zhoubinbin@loongson.cn
2026-07-02ASoC: dt-bindings: loongson,ls-audio-card: Add ATK-DL2K0300B compatibleBinbin Zhou1-0/+38
Add new compatible for the ATK-DL2K0300B development board based on Loongson-2K0300. Unlike others, this board features GPIO-controlled headphone detection, headphone control, and speaker enable. Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Link: https://patch.msgid.link/71430fcee5951fb7a7d52e2091a87707db85e06c.1782439646.git.zhoubinbin@loongson.cn Signed-off-by: Mark Brown <broonie@kernel.org>
2026-07-02ASoC: dt-bindings: loongson,ls-audio-card: Add ctcisz forever pi compatibleBinbin Zhou1-1/+3
Add a new compatible string `loongson,ls2k0300-forever-pi-audio-card` for the audio card on Loongson-2K0300 ctcisz forever pi SoC. It uses a different DAI format compared to existing Loongson platforms. The existing "loongson,ls-audio-card" remains valid for LS7A, Loongson-2K1000 and Loongson-2K2000. Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/183d809cd51874bcb78743273e4b7617f120fedb.1782439646.git.zhoubinbin@loongson.cn Signed-off-by: Mark Brown <broonie@kernel.org>
2026-07-02ASoC: dt-bindings: loongson,ls-audio-card: Use common sound cardBinbin Zhou1-6/+5
Reference the common sound card properties. This allows removing the `model` property and directly using the common `audio-routing` property later on. Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Link: https://patch.msgid.link/fa72a429a9d076d381f7d514184f19d5a35ffa51.1782439646.git.zhoubinbin@loongson.cn Signed-off-by: Mark Brown <broonie@kernel.org>
2026-07-02ASoC: dt-bindings: loongson,ls2k1000-i2s: Document Loongson-2K0300 compatibleBinbin Zhou1-1/+21
Add a new compatible string `loongson,ls2k0300-i2s` for the I2S controller found on Loongson-2K0300 SoC. Unlike Loongson-2K1000, Loongson-2K0300 does not require the second register region for APB DMA configuration, so update the binding to allow a single reg entry. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Link: https://patch.msgid.link/af092f9eabdc170c3d7951b29eee6512f748eb48.1782439646.git.zhoubinbin@loongson.cn Signed-off-by: Mark Brown <broonie@kernel.org>
2026-07-02dt-bindings: arm: rockchip: Add Youyeetoo YY3588Daniele Briguglio1-0/+5
The YY3588 is a single board computer based on the Rockchip RK3588. Add devicetree binding documentation for it. Signed-off-by: Daniele Briguglio <hello@superkali.me> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20260610-yy3588-board-v1-2-4bb7176b6826@superkali.me Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-07-02dt-bindings: vendor-prefixes: Add youyeetooDaniele Briguglio1-0/+2
Youyeetoo is the single board computer brand of Hong Kong Cybodev Tech Limited. Link: https://www.youyeetoo.com Signed-off-by: Daniele Briguglio <hello@superkali.me> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20260610-yy3588-board-v1-1-4bb7176b6826@superkali.me Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-07-02docs: infiniband: fix bracketManuel Ebner1-1/+1
Remove needless ')'. Link: https://patch.msgid.link/r/20260627093107.31068-2-manuelebner@mailbox.org Signed-off-by: Manuel Ebner <manuelebner@mailbox.org> Acked-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2026-07-02dt-bindings: leds: backlight: Document the SY7758 6-channel High Efficiency ↵Neil Armstrong1-0/+52
LED Driver Document the Silergy SY7758 6-channel High Efficiency LED Driver used for backlight brightness control. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Daniel Thompson (RISCstar) <danielt@kernel.org> Link: https://patch.msgid.link/20260529-topic-sm8650-ayaneo-pocket-s2-sy7758-v5-1-03aacd49747c@linaro.org Signed-off-by: Lee Jones <lee@kernel.org>
2026-07-02dt-bindings: display: verisilicon,dc: make resets non-optionalIcenowy Zheng1-0/+2
The only variant supported by the binding now, the DC8200 controller on T-Head TH1520, requires three reset lines. Add the reset properties to the required list to clarify this. The in-tree th1520.dtsi file isn't affected by this change because the reset lines are already populated there. The driver still considers the resets optional, so if another variant with no reset line appears, only the binding needs tweaking. Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20260702054804.164820-1-zhengxingda@iscas.ac.cn Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-07-02dt-bindings: iio: adc: add xlnx,versal-sysmon bindingSalih Erim1-0/+154
Add devicetree binding for the AMD/Xilinx Versal System Monitor (SysMon). The Versal SysMon is the successor to the Zynq UltraScale+ AMS block, providing on-chip voltage and temperature monitoring. The hardware supports up to 160 supply voltage measurement points and up to 64 temperature satellites distributed across the SoC, with configurable threshold alarms and oversampling. The device can be accessed via memory-mapped I/O or via an I2C interface. Supply and temperature channels are described as child nodes under container nodes, referencing the standard adc.yaml binding for channel properties. Co-developed-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Salih Erim <salih.erim@amd.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-07-02dt-bindings: iio: adc: mediatek,mt6359-auxadc: add mt6323 PMIC AUXADCRoman Vivchar1-1/+2
The MediaTek mt6323 PMIC includes an AUXADC used for battery voltage, temperature, and other internal measurements. The IP block is not register-compatible with mt6359. Add the devicetree binding documentation and the associated header file defining the ADC channel constants. Also change the description to 'MT6350 series and similar' because the binding already includes more than mt635x series PMICs. Finally, add the MAINTAINERS entry for the header with ADC constants. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Roman Vivchar <rva333@protonmail.com> Reviewed-by: David Lechner <dlechner@baylibre.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-07-02dt-bindings: soundwire: qcom: Increase max data ports to 17Sibi Sankar1-10/+10
Bump the maxItems from 16 to 17 for all qcom,ports-* properties to accommodate SoundWire controllers v3.1.0 with 17 data ports. WSA instances on Glymur has 6 DIN and 11 DOUT ports. Signed-off-by: Sibi Sankar <sibi.sankar@oss.qualcomm.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260701163115.3701298-2-srinivas.kandagatla@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-07-02Merge branch 'topic/config_prep_api' into nextVinod Koul1-0/+9
2026-07-02dt-bindings: dma: mediatek,uart-dma: add support for MT8189 SoCLouis-Alexis Eyraud1-0/+1
Add the compatible string for the APDMA IP found in MT8189 SoC, that supports 35-bits addressing as MT6985 SoC. Signed-off-by: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20260701-mt8189-dt-bindings-uart-dma-v1-1-c7106216a40d@collabora.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-07-02docs: watchdog: Fix bracketsManuel Ebner1-2/+2
Add missing brackets ')'. Signed-off-by: Manuel Ebner <manuelebner@mailbox.org> Reviewed-by: Randy Dunlap <rdunlap@infradead.org> Link: https://lore.kernel.org/r/20260627091707.29688-2-manuelebner@mailbox.org Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2026-07-02Documentation: bootconfig: document build-time cmdline renderingBreno Leitao1-0/+81
Add a section describing CONFIG_CMDLINE_FROM_BOOTCONFIG: what it does (renders the embedded "kernel" subtree to a flat cmdline at build time so early_param() handlers see the values), what it requires (BOOT_CONFIG_EMBED, a non-empty BOOT_CONFIG_EMBED_FILE, CONFIG_CMDLINE to be empty, and ARCH_SUPPORTS_CMDLINE_FROM_BOOTCONFIG -- currently x86 only), the bootconfig opt-in semantics, the initrd-vs-embedded precedence, and the soft-error overflow behavior. This addresses feedback from the Sashiko AI review and Masami Hiramatsu to document the CONFIG_CMDLINE requirement, which is enforced at the Kconfig level but was not mentioned in the documentation, potentially confusing users who might satisfy all other requirements but still find the option hidden in menuconfig if CONFIG_CMDLINE is non-empty. Link: https://lore.kernel.org/all/20260626-bootconfig_using_tools-v7-6-24ab72139c29@debian.org/ Signed-off-by: Breno Leitao <leitao@debian.org> Signed-off-by: Masami Hiramatsu (Google) <mhiramat@kernel.org>
2026-07-01Documentation/bpf: make it clear that kfuncs should be non-staticJP Kobryn1-8/+15
The kfunc documentation mentions how the macro __bpf_kfunc prevents inlining for static functions. This makes it sound like static kfuncs are acceptable. Although static kfuncs may happen to work, it is by chance that the compiler chose not to rename these functions and BTF resolution still succeeds. Make it clear in the documentation why kfuncs should not be declared static. First, remove wording that makes it sound like static is ok. Then point out the external naming needed for BTF resolution. Finally point out that sparse may warn on unreferenced kfuncs and that this warning can be ignored. Signed-off-by: JP Kobryn <jp.kobryn@linux.dev> Acked-by: Roman Gushchin <roman.gushchin@linux.dev> Acked-by: Yonghong Song <yonghong.song@linux.dev> Link: https://lore.kernel.org/r/20260626172026.7327-1-jp.kobryn@linux.dev Signed-off-by: Alexei Starovoitov <ast@kernel.org>
2026-07-01dt-bindings: remoteproc: qcom: Document pas for SoCCP on Hawi and Maili SoCMukesh Ojha1-0/+2
Document SoCCP remote processor used on Qualcomm Hawi and Maili SoC which is fully compatible with Kaanapali. Co-developed-by: Yijie Yang <yijie.yang@oss.qualcomm.com> Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com> Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260623-knp-soccp-v7-4-1ec7bb5c9fec@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-01dt-bindings: remoteproc: qcom: Document pas for SoCCP on Kaanapali and ↵Jingyi Wang15-1/+269
Glymur platforms Document the component used to boot SoCCP on Kaanapali SoC and add compatible for Glymur SoCCP which could fallback to Kaanapali. Extend the "qcom,smem-states", "qcom,smem-state-names" in the pas-common and add maxItems constraints for SMEM properties in the documents that reference to pas-common. Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260623-knp-soccp-v7-3-1ec7bb5c9fec@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-01dt-bindings: remoteproc: qcom: move interrupts and interrupt-names list out ↵Jingyi Wang15-26/+246
of pas-common Move interrupts and interrupt-names list out of pas-common since they will be redefined differently for Kaanapali SoCCP. Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260623-knp-soccp-v7-2-1ec7bb5c9fec@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-01dt-bindings: remoteproc: qcom: cleanup qcom,adsp.yamlJingyi Wang1-50/+14
Items in qcom,adsp.yaml has common clock and interrupt properties, move these out of the allOf section to avoid list the compatible repeatly. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260623-knp-soccp-v7-1-1ec7bb5c9fec@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-01dt-bindings: sram: qcom,imem: Narrow allowed reboot modesKrzysztof Kozlowski1-0/+20
Only few Qualcomm IMEM devices actually provide interface for setting reboot modes, but top-level schema allows "reboot-mode" child for everyone. Narrow this to specific compatibles. syscon-reboot-mode schema allows arbitrary "mode-.* properties but only a subset actually makes sense and is valid. Provide negative look-ahead pattern to disallow any modes not supported by the device, which tightens the binding even more. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260701105832.197036-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-07-01Documentation: sound: tas675x: Fix temperature range and impedance documentationSen Wang1-5/+6
Two corrections against the TRM (SLOU589A): - Corrected channel temperature range - Corrected conversion formula for global temperature Fixes: ba46edca354e ("Documentation: sound: Add TAS675x codec mixer controls documentation") Signed-off-by: Sen Wang <sen@ti.com> Link: https://patch.msgid.link/20260630183126.2588322-4-sen@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-07-01dt-bindings: iio: ti,tmp117: add binding for the TMP119Romain Gantois1-5/+11
The TMP119 has the same register layout as the TMP117, and a better local sensor accuracy. Add a compatible for it. Use ti,tmp117 as a fallback compatible for ti,tmp119. Signed-off-by: Romain Gantois <romain.gantois@bootlin.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-07-01dt-bindings: pinctrl: s32g2-siul2: describe GPIO and EIRQ resourcesKhristine Andreea Barbulescu1-6/+84
Extend the S32G2 SIUL2 pinctrl binding to describe the GPIO data and external interrupt resources present in the same SIUL2 hardware block. Besides the MSCR and IMCR registers used for pin multiplexing and pad configuration, SIUL2 also contains PGPDO and PGPDI registers for GPIO data and EIRQ registers for external interrupt control. Add GPIO controller properties because the SIUL2 block also provides GPIO functionality, and gpio-ranges are needed to describe the mapping between GPIO lines and pin controller pins. Document the interrupt controller properties. The SIUL2 block contains EIRQ hardware as part of the same register space. IRQ support itself will be added in a follow-up patch series. Update the example accordingly to show the complete SIUL2 register layout, including the GPIO data and EIRQ register windows. Reviewed-by: Linus Walleij <linusw@kernel.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Khristine Andreea Barbulescu <khristineandreea.barbulescu@oss.nxp.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-07-01dt-bindings: dma: xilinx: Fix "xlnx,irq-delay" typeRob Herring (Arm)1-1/+1
"xlnx,irq-delay" programs an 8-bit delay field in the DMA control register, and the driver stores and reads it as a byte. The binding described the property as a uint32 cell, which made the helper type check report the driver as wrong. Document "xlnx,irq-delay" as uint8 so the generated schema reflects the hardware field width and the existing driver access. Assisted-by: Codex:gpt-5-5 Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> Link: https://patch.msgid.link/20260612215226.1887726-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-07-01dt-bindings: dma: xlnx,axi-dma: Restore xlnx,flush-fsync as u32Suraj Gupta1-3/+8
The DT schema conversion incorrectly changed xlnx,flush-fsync from a u32 property to a boolean. The original binding documented values 1, 2, and 3 to select which VDMA channel(s) flush on frame sync. Restore the uint32 type with the documented enum values and fix the example accordingly. Fixes: 2d5c2952b972 ("dt-bindings: dma: xlnx,axi-dma: Convert to DT schema") Signed-off-by: Suraj Gupta <suraj.gupta2@amd.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20260625161016.1249570-1-suraj.gupta2@amd.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-07-01dt-bindings: i2c: Describe SA8255pPraveen Talari1-0/+64
Add DT bindings for the QUP GENI I2C controller on sa8255p platforms. SA8255p platform abstracts resources such as clocks, interconnect and GPIO pins configuration in Firmware. SCMI power and perf protocol are utilized to request resource configurations. SA8255p platform does not require the Serial Engine (SE) common properties as the SE firmware is loaded and managed by the TrustZone (TZ) secure environment. Co-developed-by: Nikunj Kela <quic_nkela@quicinc.com> Signed-off-by: Nikunj Kela <quic_nkela@quicinc.com> Signed-off-by: Praveen Talari <praveen.talari@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Tested-by: Mattijs Korpershoek <mkorpershoek@kernel.org> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20260617-enable-i2c-on-sa8255p-v7-1-ad736dbeab57@oss.qualcomm.com
2026-07-01dt-bindings: i2c: convert altera i2c to dt-schemaChaitanya Sabnis2-39/+62
Convert the Altera SoftIP I2C Controller bindings from legacy text format to modern dt-schema (YAML). The hardware constraints and properties remain identical. The example node was updated to use a standard 32-bit address space to clear compilation warnings. Signed-off-by: Chaitanya Sabnis <chaitanya.msabnis@gmail.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20260505053201.5795-1-chaitanya.msabnis@gmail.com
2026-07-01dt-bindings: i2c: convert axxia i2c to dt-schemaChaitanya Sabnis2-30/+52
Convert the LSI Axxia I2C Controller bindings from legacy text format to modern dt-schema (YAML). During the conversion, the obsolete `device_type = "i2c"` property was dropped from the example, as it is deprecated and not utilized by the driver. The `clock-names` property is enforced as required matching the driver probe behavior. The example node address was also updated to a standard 32-bit address. Signed-off-by: Chaitanya Sabnis <chaitanya.msabnis@gmail.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20260505100854.5258-1-chaitanya.msabnis@gmail.com
2026-07-01dt-bindings: pinctrl: qcom: Describe Maili TLMM blockJingyi Wang1-0/+120
The Top Level Mode Multiplexer (TLMM) in the Qualcomm Maili SoC provides GPIO and pinctrl functionality for UFS, SDC and 226 GPIO pins. Add a DeviceTree binding to describe the TLMM block on Qualcomm's Maili SoC. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Acked-by: Linus Walleij <linusw@kernel.org> Link: https://patch.msgid.link/20260622-maili-pinctrl-v3-1-9724e1000471@oss.qualcomm.com Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
2026-06-30ksmbd: doc: update feature support status for durable handles and compressionNamjae Jeon1-2/+2
Update ksmbd.rst to reflect the current implementation status of SMB features. Durable handles (v1, v2) and SMB3.1.1 Compression are now fully supported in ksmbd, so update their status from "Planned for future" to "Supported". Signed-off-by: Namjae Jeon <linkinjeon@kernel.org> Signed-off-by: Steve French <stfrench@microsoft.com>
2026-06-30media: dt-bindings: rc: Sync keymap list with latest listSean Young1-2/+2
The list is out of sync, so add missing entries, remove obsolete entries and sort. Signed-off-by: Sean Young <sean@mess.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
2026-06-30dt-bindings: PCI: imx6q-pcie: Add i.MX95 optional intr/aer/pme interruptsRichard Zhu1-0/+25
The i.MX95 PCIe controller introduces three additional dedicated hardware interrupt lines for specific events: - intr: general controller events - aer: Advanced Error Reporting events - pme: Power Management Events These interrupts are optional on i.MX95. PCIe basic functionality (enumeration, configuration, and data transfer) works correctly without them, as the controller can operate using only the existing MSI interrupt. Earlier i.MX PCIe variants (imx6q, imx6sx, imx6qp, imx7d, imx8mm, imx8mp, imx8mq, imx8q) do not have these three dedicated interrupt lines. Update the binding to allow up to 5 interrupts for i.MX95, while restricting earlier variants to a maximum of 2 interrupts using conditional constraints (if/then schema). This ensures the schema accurately reflects the hardware capabilities of each SoC variant. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20260618092100.3669556-2-hongxing.zhu@oss.nxp.com
2026-06-30ASoC: dt-bindings: Convert cirrus,cs35l36 to DT schemaDavid Heidelberg2-168/+240
Convert CS35L36 Speaker Amplifier to yaml. Changes: - maintainers email to the generic Cirrus email - Both the codec and downstream worked just fine without VP-supply provided. Align with datasheet for similar models. - add dai-common.yaml to cover for '#sound-dai-cells', 'sound-name-prefix' - updated not yet implemented: cirrus,weak-fet-delay -> cirrus,classh-wk-fet-delay-ms (in both definition and example) cirrus,weak-fet-thld -> cirrus,weak-fet-thld-millivolt (only in the example) - added two required properties: cirrus,boost-ctl-millivolt cirrus,boost-peak-milliamp Assisted-by: OpenAI:gpt-4 Reviewed-by: David Rhodes <David.Rhodes@cirrus.com> Co-developed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: David Heidelberg <david@ixit.cz> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20260624-dt-cirrus-cs35l36-v3-1-ec451d5a2908@ixit.cz Signed-off-by: Mark Brown <broonie@kernel.org>
2026-06-30spi: dt-bindings: snps,dw-apb-ssi: add 'power-domains' propertyWolfram Sang1-0/+3
This SPI controller likely belongs to a power domain for all the SoCs listed. For sure, it belongs to one on the Renesas RZ/N1 SoC, so enable the property to be able to describe its power domain in DTs. Suggested-by: Herve Codina <herve.codina@bootlin.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Herve Codina <herve.codina@bootlin.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20260626180326.9593-3-wsa+renesas@sang-engineering.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-06-30spi: dt-bindings: snps,dw-apb-ssi: drop superfluous RZ/N1 entryWolfram Sang1-1/+0
Commit 164c05f03ffa ("spi: Convert DW SPI binding to DT schema") added an RZ/N1 entry which was not in the original txt-file. It doesn't follow the usual "<soc entry>, <soc family entry>" style for Renesas SoCs which was properly added later with commit 029d32a892a8 ("spi: dw-apb-ssi: Integrate Renesas RZ/N1 SPI controller"). In that commit, removing the bogus entry was overlooked and is finally done now. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20260626180326.9593-2-wsa+renesas@sang-engineering.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-06-30dt-bindings: gpu: img,powervr-*: Remove Matt Coster as maintainerMatt Coster2-2/+0
I'm leaving Imagination; remove myself as a maintainer. A separate patch leaves a personal forwarding address in the .mailmap. Acked-by: Matt Coster <opensource@mtcoster.net> Acked-by: Alessio Belle <alessio.belle@imgtec.com> Link: https://patch.msgid.link/20260629-goodbye-v1-2-3bab53a80c53@imgtec.com Signed-off-by: Matt Coster <matt.coster@imgtec.com>
2026-06-30riscv: kexec_file: Add support for crashkernel CMA reservationJinjie Ruan1-8/+8
Commit 35c18f2933c5 ("Add a new optional ",cma" suffix to the crashkernel= command line option") and commit ab475510e042 ("kdump: implement reserve_crashkernel_cma") added CMA support for kdump crashkernel reservation. This allows the kernel to dynamically allocate contiguous memory for crash dumping when needed, rather than permanently reserving a fixed region at boot time. So extend crashkernel CMA reservation support to riscv. The following changes are made to enable CMA reservation: - Parse and obtain the CMA reservation size along with other crashkernel parameters. - Call reserve_crashkernel_cma() to allocate the CMA region for kdump. - Include the CMA-reserved ranges for kdump kernel to use, which was already done in of_kexec_alloc_and_setup_fdt(). - Exclude the CMA-reserved ranges from the crash kernel memory to prevent them from being exported through /proc/vmcore, which was already done in the crash core. Update kernel-parameters.txt to document CMA support for crashkernel on riscv architecture. Cc: Paul Walmsley <pjw@kernel.org> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Albert Ou <aou@eecs.berkeley.edu> Cc: Alexandre Ghiti <alex@ghiti.fr> Acked-by: Baoquan He <bhe@redhat.com> Acked-by: Mike Rapoport (Microsoft) <rppt@kernel.org> Acked-by: Paul Walmsley <pjw@kernel.org> # arch/riscv Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com> Link: https://patch.msgid.link/20260629094746.191843-11-ruanjinjie@huawei.com Signed-off-by: Mike Rapoport (Microsoft) <rppt@kernel.org>
2026-06-30arm64: kexec_file: Add support for crashkernel CMA reservationJinjie Ruan1-1/+1
Commit 35c18f2933c5 ("Add a new optional ",cma" suffix to the crashkernel= command line option") and commit ab475510e042 ("kdump: implement reserve_crashkernel_cma") added CMA support for kdump crashkernel reservation. Crash kernel memory reservation wastes production resources if too large, risks kdump failure if too small, and faces allocation difficulties on fragmented systems due to contiguous block constraints. The new CMA-based crashkernel reservation scheme splits the "large fixed reservation" into a "small fixed region + large CMA dynamic region": the CMA memory is available to userspace during normal operation to avoid waste, and is reclaimed for kdump upon crash—saving memory while improving reliability. So extend crashkernel CMA reservation support to arm64. The following changes are made to enable CMA reservation: - Parse and obtain the CMA reservation size along with other crashkernel parameters. - Call reserve_crashkernel_cma() to allocate the CMA region for kdump. - Include the CMA-reserved ranges for kdump kernel to use. - Exclude the CMA-reserved ranges from the crash kernel memory to prevent them from being exported through /proc/vmcore, which is already done in the crash core. Update kernel-parameters.txt to document CMA support for crashkernel on arm64 architecture. Tested-by: Breno Leitao <leitao@debian.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Baoquan He <bhe@redhat.com> Acked-by: Mike Rapoport (Microsoft) <rppt@kernel.org> Acked-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com> Link: https://patch.msgid.link/20260629094746.191843-10-ruanjinjie@huawei.com Signed-off-by: Mike Rapoport (Microsoft) <rppt@kernel.org>
2026-06-30dt-bindings: arm: xen: Convert to DT schemaTejas Mutalikdesai2-62/+110
Convert the Xen ARM device tree binding documentation from the legacy plain-text format (Documentation/devicetree/bindings/arm/xen.txt) to the DT schema format, as required by the modern DT binding process. The "hypervisor" node is named without a unit-address. The name is part of the Xen ABI and is matched verbatim by the kernel using strcmp() in arch/arm/xen/enlighten.c and arch/arm64/kernel/acpi.c. Allow a unit-address so this can be addressed and the dtc warnings can be avoided in the example. Signed-off-by: Tejas Mutalikdesai <tejasmutalikdesai@gmail.com> Link: https://patch.msgid.link/20260618151147.9438-1-tejasmutalikdesai@gmail.com [robh: Allow a unit-address] Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-06-30dt-bindings: PCI: renesas,r9a08g045-pcie: Add RZ/V2H(P) supportLad Prabhakar1-3/+31
Add support for the PCIe controller found on the Renesas RZ/V2H(P) SoC. The RZ/V2H(P) controller is similar to the RZ/G3E variant but includes additional registers and configuration bits for PCIe lane control. It supports multilink operation configured as either a single x4 link or two independent x2 link controllers. Unlike earlier SoCs supported by this driver which only feature a single PCIe controller, the RZ/V2H(P) SoC implements two controllers. Both instances rely on the system controller (SYSC) for configuration, but the required registers reside at different offsets for each controller. To correctly identify the controller instance and map the corresponding system controller registers, update the "renesas,sysc" property to a phandle-array. For the RZ/V2H(P) SoC, require an accompanying cell to specify the controller instance index (0 or 1). For all earlier SoCs, strictly restrict the property to a single phandle with zero argument cells. Additionally, make the "num-lanes" property mandatory for this SoC and restrict its values according to the hardware capabilities. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Link: https://patch.msgid.link/20260629220932.861445-2-prabhakar.mahadev-lad.rj@bp.renesas.com
2026-06-30dt-bindings: pinctrl: qcom,pmic-gpio: Document PMG1110 GPIO supportFenglin Wu1-0/+3
Update the binding documentation to include the compatible string for PMG1110 PMIC which is used on Maili platform. Signed-off-by: Fenglin Wu <fenglin.wu@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Linus Walleij <linusw@kernel.org> Link: https://patch.msgid.link/20260610-pmg1110-gpio-v1-1-a9c50cd8b5d9@oss.qualcomm.com Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
generated by cgit (git 2.54.0.dirty) at 2026-09-23 19:24:25 +0000